參數(shù)資料
型號： AD9782
廠商： Analog Devices, Inc.
英文描述： 12-Bit, 200 MSPS/500 MSPS TxDAC+ with 2 x /4 x /8 x Interpolation and Signal Processing
中文描述： 12位，200 MSPS/500 MSPS的TxDAC系列與2 × / 4 × / 8 ×插值與信號處理
文件頁數(shù)： 4/52頁
文件大?。?/td> 1619K
代理商： AD9782
AD9782
Preliminary Technical Data
AD9782–SPECIFICATIONS
DC SPECIFICATIONS
Table 1. T
MIN
to T
MAX
, AVDD1, AVDD2 = 3.3 V, ACVDD, ADVDD, CLKVDD, DVDD, DRVDD = 2.5 V, I
OUTFS
= 20 mA, unless
otherwise noted
Parameter
RESOLUTION
DC Accuracy
1
Integral Nonlinearity
Differential Nonlinearity
ANALOG OUTPUT
Offset Error
Gain Error (Without Internal Reference)
Gain Error (With Internal Reference)
Full-Scale Output Current
2
Output Compliance Range
Output Resistance
Output Capacitance
REFERENCE OUTPUT
Reference Voltage
Reference Output Current
3
REFERENCE INPUT
Input Compliance Range
Reference Input Resistance (Ext Reference Mode)
Small Signal Bandwith
TEMPERATURE COEFFICIENTS
Unipolar Offset Drift
Gain Drift (Without Internal Reference)
Gain Drift (With Internal Reference)
Reference Voltage Drift
POWER SUPPLY
AVDD1, AVDD2
Voltage Range
Analog Supply Current (I
AVDD1
)
Analog Supply Current (I
AVDD2
)
I
AVDD1
in SLEEP Mode
ACVDD, ADVDD
Voltage Range
Analog Supply Current (I
ACVDD
)
Analog Supply Current (I
ADVDD
)
CLKVDD
Voltage Range
Clock Supply Current (I
CLKVDD
)
DVDD
Voltage Range
Digital Supply Current (I
DVDD
)
DRVDD
Voltage Range
Digital Supply Current (I
DRVDD
)
Nominal Power Dissipation
4
OPERATING RANGE
Rev. PrC | Page 4 of 52
Min
10
–1.0
1.14
0.1
3.1
2.35
2.35
2.35
2.35
–40
Typ
12
1.5
0.75
TBD
3
1.20
1
10
0.5
3.3
2.5
2.5
2.5
2.5/3.3
1.25
Max
20
+1.0
1.26
1.25
3.5
2.65
2.65
2.65
3.5
+85
Unit
Bits
LSB
LSB
% of FSR
% of FSR
% of FSR
mA
V
k
pF
V
μA
V
M
MHz
ppm of FSR/°C
ppm of FSR/°C
ppm of FSR/°C
ppm /°C
V
mA
mA
mA
V
mA
mA
V
mA
V
mA
V
mA
W
°C
1
Measured at IOUTA driving a virtual ground.
2
Nominal full-scale current, I
OUTFS
, is 32× the I
REF
current.
3
Use an external amplifier to drive any external load.
4
Measured under the following conditions: f
DATA
= 125 MSPS, f
DAC
= 500 MSPS, 4× Interpolation, f
DAC
/4 Modulation, Hilbert Off.
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