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參數(shù)資料
| 型號： | AD7195BCPZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 38/45頁 |
| 文件大小： | 0K |
| 描述： | IC AFE 24BIT 4.8K 32LFSP |
| 設(shè)計資源： | Precision Weigh Scale Design Using AD7195 with Internal PGA and AC Excitation (CN0155) |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 位數(shù)： | 24 |
| 通道數(shù)： | 4 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 電壓 - 電源，數(shù)字： | 2.7 V ~ 5.25 V |
| 封裝/外殼： | 32-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-WQ（5x5） |
| 包裝： | 帶卷 (TR) |
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AD7195
Rev. 0 | Page 42 of 44
GROUNDING AND LAYOUT
Because the analog inputs and reference inputs are differential,
most of the voltages in the analog modulator are common-
mode voltages. The high common-mode rejection of the part
removes common-mode noise on these inputs. The analog and
digital supplies to the AD7195 are independent and separately
pinned out to minimize coupling between the analog and digi-
tal sections of the device. The digital filter provides rejection
of broadband noise on the power supplies, except at integer
multiples of the modulator sampling frequency.
Connect an R-C filter to each analog input pin to provide
rejection at the modulator sampling frequency. The digital filter
also removes noise from the analog and reference inputs pro-
vided these noise sources do not saturate the analog modulator.
As a result, the AD7195 is more immune to noise interference
than a conventional high resolution converter. However,
because the resolution of the AD7195 is so high and the noise
levels from the converter so low, care must be taken with regard
to grounding and layout.
The printed circuit board (PCB) that houses the ADC must be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. This facilitates the
use of ground planes that can be easily separated. A minimum
etch technique is generally best for ground planes because it
gives the best shielding.
Although the AD7195 has separate pins for analog and digital
ground, the AGND and DGND pins are tied together internally
via the substrate. Therefore, the user must not tie these two
pins to separate ground planes unless the ground planes are
connected together near the AD7195.
In systems where AGND and DGND are connected elsewhere
in the system, they should not be connected again at the
AD7195 because this would result in a ground loop. In these
situations, it is recommended that the ground pins of the
AD7195 be tied to the AGND plane.
In any layout, the user must keep in mind the flow of currents
in the system, ensuring that the paths for all currents are as close
as possible to the paths the currents took to reach their destin-
ations. Avoid forcing digital currents to flow through the AGND.
Avoid running digital lines under the device because this
couples noise onto the die and allow the analog ground plane
to run under the AD7195 to prevent noise coupling. The power
supply lines to the AD7195 must use as wide a trace as possible
to provide low impedance paths and reduce the effects of
glitches on the power supply line. Shield fast switching signals
like clocks with digital ground to prevent radiating noise to
other sections of the board, and never run clock signals near
the analog inputs. Avoid crossover of digital and analog signals.
Run traces on opposite sides of the board at right angles to
each other. This reduces the effects of feedthrough through
the board. A microstrip technique is by far the best but is not
always possible with a double-sided board. In this technique,
the component side of the board is dedicated to ground planes,
whereas signals are placed on the solder side.
Good decoupling is important when using high resolution ADCs.
Decouple all analog supplies with 10 μF tantalum in parallel with
0.1 μF capacitors to AGND. To achieve the best from these
decoupling components, place them as close as possible to the
device, ideally right up against the device. Decouple all logic chips
with 0.1 μF ceramic capacitors to DGND. In systems in which a
common supply voltage is used to drive both the AVDD and DVDD
of the AD7195, it is recommended that the system AVDD supply
be used. For this supply, place the recommended analog supply
decoupling capacitors between the AVDD pin of the AD7195 and
AGND and the recommended digital supply decoupling capa-
citor between the DVDD pin of the AD7195 and DGND.
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