參數(shù)資料
型號(hào)： AD7143ACPZ-1REEL
廠商： Analog Devices Inc
文件頁數(shù)： 27/57頁
文件大?。?/td> 0K
描述： IC CONV CAP-TO-DGTL PROG 16LFCSP
標(biāo)準(zhǔn)包裝： 5,000
類型： 電容數(shù)字轉(zhuǎn)換器
輸入類型： 邏輯
輸出類型： 邏輯
接口： I²C
電流 - 電源： 1mA
安裝類型： 表面貼裝
封裝/外殼： 16-VQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 16-LFCSP-VQ
包裝： 帶卷 (TR)
AD7143
Rev. 0 | Page 32 of 56
POWER-UP SEQUENCE
When the AD7143 is powered up, the following sequence is
recommended when initially developing the AD7143 and
Host μC serial interface:
1.
Turn on the power supplies to the AD7143.
2.
Write to the Bank 2 registers at Address 0x080 through
Address 0x0DF. These registers are contiguous, so a
sequential register write sequence can be applied.
Note: The Bank 2 register values are unique for each
application. Register values are provided by Analog
Devices after the sensor board has been developed.
3.
Write to the Bank 1 registers at Address 0x000 through
Address 0x007 as outlined below. These registers are
contiguous so a sequential register write sequence can be
applied
Caution: At this time, Address 0x001 must remain set to
default value 0x0000 during this contiguous write
operation.
Register values:
Address 0x000 = 0x00B2
Address 0x001 = 0x0000
Address 0x002 = 0x0690
Address 0x003 = 0x0664
Address 0x004 = 0x290F
Address 0x005 = 0x0000
Address 0x006 = 0x0000
Address 0x007 = 0x0001 (The AD7143 interrupt is asserted
approximately every 25 ms.)
4.
Write to the Bank 1 register, Address 0x001 = 0x0FFF.
5.
Read back the corresponding interrupt status register at
Address 0x008, Address 0x009, or Address 0x00A. This is
determined by the interrupt output configuration as
explained in the Interrupt Output section.
Note: The specific registers required to be readback depend
on each application. Analog Devices provides this
information after the sensor board has been developed.
6.
Repeat Step 5 each time INT is asserted.
FIRST CONVERSION SEQUENCE
CONVERSION
STAGE
0
CONVERSION STAGES DISABLED
1
2
3
4
5
6
7
8
9
10 11
0
1
2
910 11
0
1
2
910 11
0
1
SECOND CONVERSION
SEQUENCE
THIRD CONVERSION
SEQUENCE
0
6472-
042
POWER
HOST
SERIAL
INTERFACE
AD7143 INT
Figure 45. Recommended Start-Up Sequence
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