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參數(shù)資料
| 型號： | 935270523557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64 |
| 文件頁數(shù)： | 67/93頁 |
| 文件大?。?/td> | 2118K |
| 代理商： | 935270523557 |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 03 — 27 February 2003
7 of 89
9397 750 10765
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
Symbol names with an overscore (e.g. NAME) represent active LOW signals.
H_DM1
50
AI/O
USB D
data line for HC’s downstream port 1
H_DP1
51
AI/O
USB D+ data line for HC’s downstream port 1
H_DM2
52
AI/O
USB D
data line for HC’s downstream port 2; when not in
use, leave this pin open
H_DP2
53
AI/O
USB D+ data line for HC’s downstream port 2; when not in
use, leave this pin open
H_OC1
54
I
overcurrent sensing input for HC’s downstream port 1
H_OC2
55
I
overcurrent sensing input for HC’s downstream port 2
VCC
56
-
digital power supply voltage input (3.0 to 3.6 V or
4.75 to 5.25 V). This pin has been connected to the
internal 3.3 V regulator input. When connected to 5 V, the
internal regulator will output 3.3 V to pins Vreg(3.3), Vhold1
and Vhold2. When connected to 3.3 V, it will bypass the
internal regulator.
AGND
57
-
analog ground
Vreg(3.3)
58
-
internal 3.3 V regulator output; when pin VCC is connected
to 5 V, this pin outputs 3.3 V. When pin VCC is connected to
3.3 V, this pin should also be connected to 3.3 V.
A0
59
I
address input; selects command (A0 = 1) or data (A0 = 0)
LOW_PW
60
I
if low-current consumption (range of
s) is needed during
suspend, connect this pin to address A1; otherwise,
connect to DGND
n.c.
61
-
not connected; leave this pin open
DGND
62
-
digital ground
D0
63
I/O
bit 0 of bidirectional data; slew-rate controlled; TTL input;
three-state output
D1
64
I/O
bit 1 of bidirectional data; slew-rate controlled; TTL input;
three-state output
Table 2:
Pin description for LQFP64…continued
Symbol[1]
Pin
Type
Description
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| 935270668112 | POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 |
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| 935272535157 | POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PBGA56 |
| 935268661112 | POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO48 |
| 935270671112 | CBT/FST/QS/5C/B SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 935270713557 | 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP |
| 935270792551 | 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA |
| 935270792557 | 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA |
| 935270793551 | 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA |
| 935270793557 | 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA |
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