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參數(shù)資料
| 型號(hào)： | 935270523557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64 |
| 文件頁數(shù)： | 3/93頁 |
| 文件大?。?/td> | 2118K |
| 代理商： | 935270523557 |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 03 — 27 February 2003
11 of 89
9397 750 10765
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
1. The microprocessor writes the command code of 27H (0027H in 16-bit width) to
the ISP1160’s HC command port
2. The microprocessor reads the data word of the chip’s ID (6110H) from the
ISP1160’s HC data port.
Most of the ISP1160’s internal control registers are 16-bit wide. Some of the internal
control registers, however, are 32-bit wide. Figure 7 shows how the ISP1160’s 32-bit
internal control register is accessed. The complete cycle of accessing a 32-bit
register consists of a command phase followed by two data phases. In the two data
phases, the microprocessor should rst read or write the lower 16-bit data, followed
by the upper 16-bit data.
To further describe the complete access cycles of ISP1160’s internal control
registers, the status of some pin signals of the microprocessor bus interface is shown
in Figure 8.
Fig 6.
16-bit register access cycle.
Fig 7.
32-bit register access cycle.
Fig 8.
Accessing the ISP1160 HC control registers.
MGT937
read/write data
(16 bits)
16-bit register access cycle
t
write command
(16 bits)
MGT938
read/write data
(lower 16 bits)
32-bit register access cycle
t
read/write data
(upper 16 bits)
write command
(16 bits)
Signals
Valid status
CS
0
A0
1
Valid status
0
Valid status
0
RD, WR
RD = 1,
WR = 0
RD = 0 (read) or
WR = 0 (write)
data bus
Command code
Register data
(upper word)
Register data
(lower word)
RD = 0 (read) or
WR = 0 (write)
004aaa063
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