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| 型號(hào)： | 935270523557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64 |
| 文件頁(yè)數(shù)： | 55/93頁(yè) |
| 文件大?。?/td> | 2118K |
| 代理商： | 935270523557 |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 03 — 27 February 2003
59 of 89
9397 750 10765
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Code (Hex): 20 — read
Code (Hex): A0 — write
Remark:
1. Bit 0, InterruptPinEnable, is used as pin INT’s master interrupt enable. This bit
should be used together with the register Hc
PInterruptEnable to enable pin INT.
2. Bits 4:3 are xed at the value 01B for the ISP1160.
10.4.2
HcDMAConguration register (21H—Read, A1H—Write)
2
InterruptOutputPolarity
0 — active LOW. Power-up value
1 — active HIGH
1
InterruptPinTrigger
0 — interrupt is level-triggered. Power-up value
1 — interrupt is edge-triggered
0
InterruptPinEnable
0 — power-up value
1 — global interrupt pin INT is enabled
Table 37:
HcHardwareConguration register: bit description…continued
Bit
Symbol
Description
Table 38:
HcDMAConguration register: bit allocation
Bit
15
14
13
12
11
10
9
8
Symbol
reserved
Reset
00000000
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
BurstLen[1:0]
DMA
Enable
reserved
DMA
Counter
Select
ITL_ATL_
DataSelect
DMARead
WriteSelect
Reset
00000000
Access
R/W
Table 39:
HcDMAConguration register: bit description
Bit
Symbol
Description
15 to 7
-
reserved
6 to 5
BurstLen[1:0]
00B — single-cycle burst DMA
01B — 4-cycle burst DMA
10B — 8-cycle burst DMA
11B — reserved
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