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參數(shù)資料
| 型號： | 935270523557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64 |
| 文件頁數(shù)： | 24/93頁 |
| 文件大?。?/td> | 2118K |
| 代理商： | 935270523557 |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 03 — 27 February 2003
30 of 89
9397 750 10765
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
buffer again and ISO processing be unable to be carried on. This also applies to the
ITL1 buffer because the ITL0 and ITL1 are Ping-Pong structured buffers. To recover
from this state the power-on reset or software reset will have to be applied on the HC.
9.5.1
Time domain behavior
In example 1 (Figure 21), the CPU is fast enough to read back and download a
scenario before the next interrupt. Note that on the ISO interrupt of frame N:
The ISO packet for frame N + 1 will be written
The AT packet for frame N + 1 will be written.
In example 2 (Figure 22), the microprocessor is still busy transferring the AT data
when the ISO interrupt of the next frame (N + 1) is raised. As a result, there will be no
AT trafc in frame N + 1. The HC does not raise an AT interrupt in frame N + 1. The
AT part is simply postponed until frame N + 2. On the AT N + 2 interrupt, the transfer
mechanism is back to the normal operation. This simple mechanism ensures, among
other things, that Control transfers are not dropped systematically from the USB in
case of an overloaded microprocessor.
In example 3 (Figure 23), the ISO part is still being written while the Start of Frame
(SOF) of the next frame has occurred. This will result in undened behavior for the
ISO data on the USB bus in frame N + 1 (depending on the exact timing data is
corrupted or not). The HC should not raise an AT interrupt in frame N + 1.
Fig 21. HC time domain behavior: example 1.
MGT954
(frame N)
(frame N
+ 1)
(frame N
+ 2)
(frame N
+ 3)
read ISO_A(N
1) write ISO_A(N + 1)
SOF
read AT(N)
write AT(N
+ 1)
AT
interrupt
traffic
on USB
ISO
interrupt
Fig 22. HC time domain behavior: example 2.
MGT955
(frame N)
(frame N
+ 1)
(frame N
+ 2)
(frame N
+ 3)
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