
PowerPC 440SP Embedded Processor
72
AMCC Proprietary
Revision 1.23 - Sept 26, 2006
Data Sheet
Table 14. I/O Specifications—All Speeds
(Sheet 1 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133.33MHz. PCI-X input setup time requirement is 1.2ns for 133.33MHz
and 1.7ns for 66.66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66.66MHz. PCI output hold time
requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.
3. These are DDR signals that can change on both the positive and negative clock transitions.
Signal
Input (ns)
Output (ns)
Output Current (mA)
Clock
Notes
Setup Time
(TIS min)
Hold Time
(TIH min)
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(minimum)
I/O L
(minimum)
PCI-X Interfaces
PCIX0:2Ack64
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:1AD63:00
PCIX2AD31:00
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:1BE7:0
PCIX2BE3:0
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2CalG0:1
Note 2 (2)
0.5(0)
na
PCIX0:2Clk
2
PCIX0:1CalR0:1
dc
na
async
PCIX0:2Cap
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2Clk
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2DevSel
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2ECC5:2
na
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2Frame
na
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2Gnt0
na
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2Gnt1
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:1Gnt2:3
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2IDSel
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2INTA
Note 2 (2)
0.5(0)
na
PCIX0:2Clk
2
PCIX0:2IRDY
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:1M66En
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2Par
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:1Par64
Note 2 (2)
0.5(0)
na
PCIX0:2Clk
2
PCIX0:2PErr
Note 2 (2)
0.5(0)
na
PCIX0:2Clk
2
PCIX0:1Req0
Note 2 (2)
0.5(0)
na
PCIX0:2Clk
2
PCIX0:1Req1:3
PCIX2Req1
na
PCIX0:2Clk
2
PCIX0:2Req64
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2Reset
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2SErr
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2Stop
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2TRDY
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2
PCIX0:2VC
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0:2Clk
2