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參數(shù)資料
| 型號： | μPD30100 |
| 廠商： | NEC Corp. |
| 英文描述： | 64-bit RISC Microprosessor(64位 RISC 微處理器) |
| 中文描述： | 64位RISC Microprosessor（64位的RISC微處理器） |
| 文件頁數(shù)： | 19/52頁 |
| 文件大小： | 365K |
| 代理商： | ΜPD30100 |
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19
μ
PD30100
Figure 3-9. Byte Address in Double-Word: Big Endian
Lower
address
Higher
address
Word
Half word
Byte
Double-word
address
16
63
32 31
16 15
8 7
0
8
0
16
8
0
17
9
1
18
19
20
21
22
23
10
11
12
13
14
15
2
3
4
5
6
7
Remarks 1.
The most significant byte is at the lowest address.
2.
The word is addressed at the highest address.
Figure 3-10. Byte Address in Double-Word: Little Endian
Lower
address
Higher
address
Word
Half word
Byte
Double-word
address
16
63
32 31
16 15
8 7
0
8
0
23
15
7
22
14
6
21
20
19
18
17
16
13
12
11
10
9
8
5
4
3
2
1
0
Remarks 1.
The least significant byte is at the lowest address.
2.
The word is addressed at the lowest address.
3.7 Virtual Storage
The V
R
4100 has a virtual storage management mechanism using TLB.
Virtual addresses are used for address management by the software or address calculation of the pipeline.
To access the memory or I/O such as to fetch the program or access data, physical addresses converted from
virtual addresses by the TLB are used.
Some addresses of the virtual address space are not converted into physical addresses by the TLB.
Conversion to physical addresses is carried out by only changing specific addresses. If only this space is used,
the processor can be used in the same manner as a CPU that operates with physical addresses.
3.7.1 Virtual address space
The V
R
4100 has two operation modes: 32-bit and 64-bit modes. It also has three operating modes: user,
supervisor, and kernel. The figures below show the virtual address spaces in each operating mode.
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