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參數(shù)資料
| 型號： | μPD30100 |
| 廠商： | NEC Corp. |
| 英文描述： | 64-bit RISC Microprosessor(64位 RISC 微處理器) |
| 中文描述： | 64位RISC Microprosessor（64位的RISC微處理器） |
| 文件頁數(shù)： | 15/52頁 |
| 文件大?。?/td> | 365K |
| 代理商： | ΜPD30100 |
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15
μ
PD30100
(b) DMADD16 (Doubleword Multiply and Add 16-bit Integer)
Multiplies the contents of general-purpose register rs by the contents of general-purpose register rt. Both
the operands are treated as 16-bit signed integers. The bits 62 through 15 of both the operands must be
sign-extended values.
The result of the multiplication is added to the value of the special register HI. The result of the addition
is treated as a signed integer. The 64-bit result is loaded to the special register LO.
An integer overflow exception does not occur.
This operation is defined in the 64-bit mode and 32-bit kernel mode. If this instruction is executed in the
32-bit user or supervisor mode, a reserved instruction exception occurs.
(4) Additional instructions for power modes
The V
R
4100 supports three power modes to reduce the power dissipation, and has dedicated instructions to set
these modes.
Note that these dedicated instructions are not correctly executed by the other processors in the V
R
series.
Here are the details of the operations for the power modes:
(a) STANDBY (Standby)
Changes the mode of the processor from Fullspeed to Standby.
When execution of the instruction proceeds to the WB stage, the processor waits for the SysAD bus to enter
the idle status, then fixes the internal clock to the high level and stops pipeline operation.
In the Standby mode, the PLL, clock related to the timer/interrupt, and system interface clocks (TClock and
MasterOut) operate normally.
To change the mode from Standby to Fullspeed, either generate a hardware interrupt, timer interrupt or NMI,
or execute a software reset or cold reset.
(b) SUSPEND (Suspend)
Changes the mode of the processor from Fullspeed to Suspend.
When execution of the instruction proceeds to the WB stage, the processor waits for the SysAD bus to enter
the idle status, then fixes the internal clock and TClock to the high level and stops the operation of the pipeline
and the external bus interface.
In the Suspend mode, the PLL, clock related to the timer/interrupt, and MasterOut operate normally.
To change the mode from Suspend to Fullspeed, either generate a hardware interrupt, timer interrupt or NMI,
or execute a software reset or cold reset.
(c) HIBERNATE (Hibernate)
Changes the mode of the processor from Fullspeed to Hibernate.
When execution of the instruction proceeds to the WB stage, the processor waits for the SysAD bus to enter
the idle status, then fixes the all the clocks to the high level and stops pipeline operation.
To change the mode from Hibernate to Fullspeed, execute a cold reset.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PD301-024-03-PC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
| PD301-024-03-P-C-200 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DC to DC Converter |
| PD301-024-03-P-C-250 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DC to DC Converter |
| PD301-024-03-P-C-300 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DC to DC Converter |
| PD301-024-03-PI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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