參數(shù)資料
型號(hào)： XRT91L80IB
廠(chǎng)商： Exar Corporation
文件頁(yè)數(shù)： 8/46頁(yè)
文件大?。?/td> 0K
描述： IC TXRX SONET/SDH 4BIT 196STBGA
產(chǎn)品變化通告： XRT91L80IB Obsolescence 6/Sept/2010
標(biāo)準(zhǔn)包裝： 126
類(lèi)型： 收發(fā)器
規(guī)程： SONET/SDH
電源電壓： 3.3V
安裝類(lèi)型： 表面貼裝
封裝/外殼： 196-LFBGA
供應(yīng)商設(shè)備封裝： 196-STBGA（12x12）
包裝： 托盤(pán)
XRT91L80
xr
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
REV. 1.0.0
14
2.0
RECEIVE SECTION
The receive section of XRT91L80 includes the differential inputs RXIP/N, followed by the clock and data
recovery unit (CDR) and receive serial-to-parallel converter (SIPO). The receiver accepts the high speed Non-
Return to Zero (NRZ) serial data at 2.488/2.666 Gbps through the differential input interfaces RXIP/N. The
clock and data recovery unit recovers the high-speed receive clock from the incoming scrambled NRZ data
stream. The recovered serial data is converted into 4-bit-wide 622.08/666.51 Mbps parallel data and presented
to the RXD[3:0]P/N LVDS parallel interface. A divide-by-4 version of the high-speed recovered clock,
RXPCLKOP/N, is used to synchronize the transfer of the 4-bit RXDO[3:0]P/N data with the receive portion of
the upstream device. Upon initialization or loss of signal or loss of lock the 77.76/155.52 MHz (83.31/166.63
MHz) external local reference clock is used to start-up the clock recovery phase-locked loop for proper
operation. A special loop-back feature can be configured when parallel remote loopback (RLOOPP) is used in
conjunction with de-jittered loop-time mode that allows the re-transmitted data to comply with ITU and Bellcore
jitter generation specifications.
2.1
Receive Serial Input
The receive serial CML inputs are applied to RXIP/N. The receive serial inputs can be AC or DC coupled to an
optical module or an electrical interface. A simplified AC coupled block diagram is shown in Figure 4.
NOTE: Some optical modules integrate AC coupled capacitors within the module. If so, the external AC coupled capacitors
are not necessary and can be excluded.
The 2.488/2.666 Gbps high-speed differential CML RXIP/N input swing characteristics is shown in Table 2.
FIGURE 4. RECEIVE SERIAL INPUT INTERFACE BLOCK
TABLE 2: DIFFERENTIAL CML INPUT SWING PARAMETERS
PARAMETER
DESCRIPTION
MIN
TYP
MAX
UNITS
V
INDIFF
Differential Input Voltage Swing
200
1000
mV
V
INSE
Single-Ended Input Voltage Swing
100
500
mV
V
INBIAS
Input Bias Range (AC Coupled)
1.0
1.4
V
RDIFF
Differential Input Resistance
75
125
XRT91L80
STS-48/
STM-16
Transceiver
Optical Module
0.1
F
0.1
F
RXIP
RXIN
Optical Fiber
相關(guān)PDF資料
PDF描述
V24B48M150BG2 CONVERTER MOD DC/DC 48V 150W
VI-J52-MX-F1 CONVERTER MOD DC/DC 15V 75W
V24B48M150BF2 CONVERTER MOD DC/DC 48V 150W
VI-J51-MX-F4 CONVERTER MOD DC/DC 12V 75W
V24B36M150BL CONVERTER MOD DC/DC 36V 150W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT91L80IB-F 功能描述:總線(xiàn)收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
XRT91L81 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L81IB 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:2.488/2.666GBPS OC-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
XRT91L82ES 功能描述:總線(xiàn)收發(fā)器 Transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*