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參數(shù)資料
型號(hào): XRT91L80IB
廠商: Exar Corporation
文件頁(yè)數(shù): 42/46頁(yè)
文件大小: 0K
描述: IC TXRX SONET/SDH 4BIT 196STBGA
產(chǎn)品變化通告: XRT91L80IB Obsolescence 6/Sept/2010
標(biāo)準(zhǔn)包裝: 126
類型: 收發(fā)器
規(guī)程: SONET/SDH
電源電壓: 3.3V
安裝類型: 表面貼裝
封裝/外殼: 196-LFBGA
供應(yīng)商設(shè)備封裝: 196-STBGA(12x12)
包裝: 托盤
xr
XRT91L80
REV. 1.0.0
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
II
FIGURE 14. SIMPLIFIED DIAGRAM OF THE EXTERNAL LOOP FILTER .................................................................................................. 23
3.9 TRANSMIT SERIAL OUTPUT CONTROL ..................................................................................................... 23
FIGURE 15. TRANSMIT SERIAL OUTPUT INTERFACE BLOCK .............................................................................................................. 23
4.0 DIAGNOSTIC FEATURES ................................................................................................................... 24
4.1 SERIAL REMOTE LOOPBACK ..................................................................................................................... 24
FIGURE 16. SERIAL REMOTE LOOPBACK......................................................................................................................................... 24
4.2 PARALLEL REMOTE LOOPBACK ............................................................................................................... 24
FIGURE 17. PARALLEL REMOTE LOOPBACK .................................................................................................................................... 24
4.3 DIGITAL LOCAL LOOPBACK ....................................................................................................................... 25
FIGURE 18. DIGITAL LOOPBACK...................................................................................................................................................... 25
4.4 SONET JITTER REQUIREMENTS ................................................................................................................. 26
4.4.1 JITTER TOLERANCE: ................................................................................................................................................ 26
FIGURE 19. JITTER TOLERANCE MASK............................................................................................................................................ 26
FIGURE 20. 91L80 MEASURED JITTER TOLERANCE WITH EXTERNAL JITTER ATTENUATION ENABLED IN LOOPTIMING AT 2.488 GBPS IN STS-
48.................................................................................................................................................................................. 27
4.4.2 JITTER TRANSFER .................................................................................................................................................... 27
FIGURE 21. 91L80 MEASURED JITTER TRANSFER WITH EXTERNAL JITTER ATTENUATION ENABLED IN LOOPTIMING AT 2.488 GBPS IN STS-
48.................................................................................................................................................................................. 27
4.4.3 JITTER GENERATION................................................................................................................................................ 28
FIGURE 22. 91L80 MEASURED ELECTRICAL PHASE NOISE TRANSMIT JITTER GENERATION AT 2.488 GBPS...................................... 28
FIGURE 23. 91L80 MEASURED ELECTRICAL PHASE NOISE RECEIVE JITTER GENERATION AT 2.488 GBPS........................................ 28
5.0 SERIAL MICROPROCESSOR INTERFACE BLOCK ......................................................................... 29
FIGURE 24. SIMPLIFIED BLOCK DIAGRAM OF THE SERIAL MICROPROCESSOR INTERFACE ................................................................. 29
5.1 SERIAL TIMING INFORMATION ................................................................................................................... 29
FIGURE 25. TIMING DIAGRAM FOR THE SERIAL MICROPROCESSOR INTERFACE ................................................................................ 29
5.2 16-BIT SERIAL DATA INPUT DESCRITPTION ............................................................................................. 30
5.2.1 R/W (SCLK1)............................................................................................................................................................... 30
5.2.2 A[5:0] (SCLK2 - SCLK7)............................................................................................................................................. 30
5.2.3 X (DUMMY BIT SCLK8) .............................................................................................................................................. 30
5.2.4 D[7:0] (SCLK9 - SCLK16)........................................................................................................................................... 30
5.3 8-BIT SERIAL DATA OUTPUT DESCRIPTION ............................................................................................. 30
6.0 REGISTER MAP AND BIT DESCRIPTIONS ....................................................................................... 31
TABLE 10: MICROPROCESSOR REGISTER MAP................................................................................................................................ 31
TABLE 11: MICROPROCESSOR REGISTER 0X00H BIT DESCRIPTION ................................................................................................. 31
TABLE 12: MICROPROCESSOR REGISTER 0X01H BIT DESCRIPTION ................................................................................................. 32
TABLE 13: MICROPROCESSOR REGISTER 0X02H BIT DESCRIPTION ................................................................................................. 32
TABLE 14: MICROPROCESSOR REGISTER 0X03H BIT DESCRIPTION ................................................................................................. 33
TABLE 15: MICROPROCESSOR REGISTER 0X04H BIT DESCRIPTION ................................................................................................. 35
TABLE 16: MICROPROCESSOR REGISTER 0X05H BIT DESCRIPTION ................................................................................................. 35
TABLE 17: MICROPROCESSOR REGISTER 0X3EH BIT DESCRIPTION ................................................................................................. 37
TABLE 18: MICROPROCESSOR REGISTER 0X3FH BIT DESCRIPTION ................................................................................................. 37
7.0 ELECTRICAL CHARACTERISTICS ................................................................................................... 38
ABSOLUTE MAXIMUM RATINGS .................................................................................................................. 38
POWER AND CURRENT DC ELECTRICAL CHARACTERISTICS.................................................................... 38
................................................................................................................................................................... 39
COMMON MODE LOGIC SIGNAL DC ELECTRICAL CHARACTERISTICS ................................................ 39
................................................................................................................................................................... 39
LVPECL LOGIC SIGNAL DC ELECTRICAL CHARACTERISTICS .......................................................... 39
LVDS LOGIC SIGNAL DC ELECTRICAL CHARACTERISTICS............................................................... 40
LVTTL/LVCMOS SIGNAL DC ELECTRICAL CHARACTERISTICS ........................................................... 40
ORDERING INFORMATION .................................................................................................................. 41
REVISION HISTORY ...................................................................................................................................... 42
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