參數(shù)資料
型號: XRT83VSH314IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA304
封裝: 31 X 31 MM, 1.27 MM PITCH, PLASTIC, BGA-304
文件頁數(shù): 69/80頁
文件大?。?/td> 497K
代理商: XRT83VSH314IB
XRT83VSH314
66
REV. 1.0.1
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
n
D2
BYTEsel
LCV Counter Byte Select
This bit is used to select the MSB or LSB for Reading the contents
of the LCV counter for a given channel. The channel is addressed
by using bits D[3:0] in register 0xE5h. By default, the LSB byte is
selected.
0 = Low Byte
1 = High Byte
R/W
0
D1
chUPDATE
LCV Counter Update Per Channel
This bit is used to latch the contents of the counter for a given
channel into a holding register so that the value of the counter can
be read. The channel is addressed by using bits D[3:0] in register
0xE5h.
0 = Normal Operation
1 = Updates the Selected Channel
R/W
0
D0
ChRST
LCV Counter Reset Per Channel
This bit is used to reset the LCV counter of a given channel to its
default state 0000h. The channel is addressed by using bits D[3:0]
in register 0xE5h. This bit must be set to "1" for 1
μ
S.
0 = Normal Operation
1 = Resets the Selected Channel
R/W
0
T
ABLE
47: M
ICROPROCESSOR
R
EGISTER
0
X
E7
H
B
IT
D
ESCRIPTIO
G
LOBAL
R
EGISTER
(0
X
E7
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D[7:0]
Reserved
These Register Bits are Not Used
R/W
0
T
ABLE
46: M
ICROPROCESSOR
R
EGISTER
0
X
E6
H
B
IT
D
ESCRIPTION
G
LOBAL
R
EGISTER
(0
X
E6
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
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