參數(shù)資料
型號: XRT83VSH314IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA304
封裝: 31 X 31 MM, 1.27 MM PITCH, PLASTIC, BGA-304
文件頁數(shù): 49/80頁
文件大?。?/td> 497K
代理商: XRT83VSH314IB
XRT83VSH314
46
REV. 1.0.1
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
6.3
If the LIU is interfaced to a MPC86X type μP, it should be configured to operate in the MPC86X mode.
MPC86X Read and Write operations are described below.
MPC86X Mode Read Cycle
1.
Place the address of the target register on the address bus input pins ADDR[10:0].
2.
While the μP is placing this address value on the address bus, the address decoding circuitry should
assert the CS pin of the LIU, by toggling it "Low". This action enables further communication between the
μP and the LIU microprocessor interface block.
3.
Next, the μP should indicate that this current bus cycle is a Read operation by pulling the R/W input pin
"High".
4.
The LIU will toggle the TA output pin "Low". The LIU does this in order to inform the μP that the data is
available to be read by the μP.
5.
After the μP detects the TA signal and has read the data, it can terminate the Read Cycle by toggling the
CS input pin "High".
MPC86X Mode Write Cycle
1.
Place the address of the target register on the address bus input pins ADDR[10:0].
2.
While the μP is placing this address value on the address bus, the address decoding circuitry should
assert the CS pin of the LIU, by toggling it "Low". This action enables further communication between the
μP and the LIU microprocessor interface block.
3.
Next, the μP should indicate that this current bus cycle is a Write operation by pulling the R/W input pin
"Low".
4.
Toggle the WE input pin "Low".
5.
After the μP toggles the WE signal "Low", the LIU will toggle the TA output pin "Low". The LIU does this in
order to inform the μP that the data has been written into the internal register location.
6.
After the μP detects the TA signal, the Write operation is completed by toggling both WE and CS pins
“High”.
The Motorola Read and Write timing diagram is shown in
Figure 34
. The timing specifications are shown in
Table 18
.
MPC86X Mode Programmed I/O Access (Synchronous)
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