參數(shù)資料
型號: XRT83VSH314IB
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
中文描述: DATACOM, PCM TRANSCEIVER, PBGA304
封裝: 31 X 31 MM, 1.27 MM PITCH, PLASTIC, BGA-304
文件頁數(shù): 62/80頁
文件大?。?/td> 497K
代理商: XRT83VSH314IB
XRT83VSH314
59
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.1
N
OTE
:
Any change in status will generate an interrupt (if enabled in channel register 0x04h and GIE is set to "1" in the
global register 0xE0h). The status registers are reset upon read (RUR).
D1
RLOSIS
Receiver Loss of Signal Interrupt Status
0 = No change
1 = Change in status occurred
RUR
0
D0
QRPDIS
Quasi Random Pattern Detection Interrupt Status
0 = No change
1 = Change in status occurred
RUR
0
T
ABLE
31: M
ICROPROCESSOR
R
EGISTER
0
X
07
H
B
IT
D
ESCRIPTION
C
HANNEL
0-13 (0
X
07
H
-0
X
D7
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D[7:0]
Reserved
These Bits are Reserved
RO
0
T
ABLE
32: M
ICROPROCESSOR
R
EGISTER
0
X
08
H
B
IT
D
ESCRIPTION
C
HANNEL
0-13 (0
X
08
H
-0
X
D8
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved
This Register Bit is Not Used
X
0
D6
D5
D4
D3
D2
D1
D0
1SEG6
1SEG5
1SEG4
1SEG3
1SEG2
1SEG1
1SEG0
Arbitrary Pulse Generation
The transmit output pulse is divided into 8 individual segments.
This register is used to program the first segment which corre-
sponds to the overshoot of the pulse amplitude. There are four
segments for the top portion of the pulse and four segments for the
bottom portion of the pulse. Segment number 5 corresponds to
the undershoot of the pulse. The MSB of each segment is the sign
bit.
Bit 6 = 0 = Negative Direction
Bit 6 = 1 = Positive Direction
R/W
0
0
0
0
0
0
0
T
ABLE
30: M
ICROPROCESSOR
R
EGISTER
0
X
06
H
B
IT
D
ESCRIPTION
C
HANNEL
0-13 (0
X
06
H
-0
X
D6
H
)
B
IT
N
AME
F
UNCTION
Register
Type
Default
Value
(HW reset)
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