
XRT83VSH314
III
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.1
T
ABLE
23: M
ICROPROCESSOR
R
EGISTER
0
X
00
H
B
IT
D
ESCRIPTION
................................................................................................. 51
T
ABLE
24: C
ABLE
L
ENGTH
S
ETTINGS
............................................................................................................................................. 52
T
ABLE
25: M
ICROPROCESSOR
R
EGISTER
0
X
01
H
B
IT
D
ESCRIPTION
................................................................................................. 53
T
ABLE
26: M
ICROPROCESSOR
R
EGISTER
0
X
02
H
B
IT
D
ESCRIPTION
................................................................................................. 54
T
ABLE
27: M
ICROPROCESSOR
R
EGISTER
0
X
03
H
B
IT
D
ESCRIPTION
................................................................................................. 55
T
ABLE
28: M
ICROPROCESSOR
R
EGISTER
0
X
04
H
B
IT
D
ESCRIPTION
................................................................................................. 56
T
ABLE
29: M
ICROPROCESSOR
R
EGISTER
0
X
05
H
B
IT
D
ESCRIPTION
................................................................................................. 57
T
ABLE
30: M
ICROPROCESSOR
R
EGISTER
0
X
06
H
B
IT
D
ESCRIPTION
................................................................................................. 58
T
ABLE
31: M
ICROPROCESSOR
R
EGISTER
0
X
07
H
B
IT
D
ESCRIPTION
................................................................................................. 59
T
ABLE
32: M
ICROPROCESSOR
R
EGISTER
0
X
08
H
B
IT
D
ESCRIPTION
................................................................................................. 59
T
ABLE
33: M
ICROPROCESSOR
R
EGISTER
0
X
09
H
B
IT
D
ESCRIPTION
................................................................................................. 60
T
ABLE
34: M
ICROPROCESSOR
R
EGISTER
0
X
0A
H
B
IT
D
ESCRIPTION
................................................................................................. 60
T
ABLE
35: M
ICROPROCESSOR
R
EGISTER
0
X
0B
H
B
IT
D
ESCRIPTION
................................................................................................. 60
T
ABLE
36: M
ICROPROCESSOR
R
EGISTER
0
X
0C
H
B
IT
D
ESCRIPTION
................................................................................................. 60
T
ABLE
37: M
ICROPROCESSOR
R
EGISTER
0
X
0D
H
B
IT
D
ESCRIPTION
................................................................................................. 61
T
ABLE
38: M
ICROPROCESSOR
R
EGISTER
0
X
0E
H
B
IT
D
ESCRIPTION
................................................................................................. 61
T
ABLE
39: M
ICROPROCESSOR
R
EGISTER
0
X
0F
H
B
IT
D
ESCRIPTION
................................................................................................. 61
T
ABLE
40: M
ICROPROCESSOR
R
EGISTER
0
X
E0
H
B
IT
D
ESCRIPTION
................................................................................................. 61
T
ABLE
41: M
ICROPROCESSOR
R
EGISTER
0
X
E1
H
B
IT
D
ESCRIPTION
................................................................................................. 62
T
ABLE
42: M
ICROPROCESSOR
R
EGISTER
0
X
E2
H
B
IT
D
ESCRIPTION
................................................................................................. 63
T
ABLE
43: M
ICROPROCESSOR
R
EGISTER
0
X
E3
H
B
IT
D
ESCRIPTION
................................................................................................. 63
T
ABLE
44: M
ICROPROCESSOR
R
EGISTER
0
X
E4
H
B
IT
D
ESCRIPTION
................................................................................................. 64
T
ABLE
45: M
ICROPROCESSOR
R
EGISTER
0
X
E5
H
B
IT
D
ESCRIPTION
................................................................................................. 64
T
ABLE
46: M
ICROPROCESSOR
R
EGISTER
0
X
E6
H
B
IT
D
ESCRIPTION
................................................................................................. 65
T
ABLE
47: M
ICROPROCESSOR
R
EGISTER
0
X
E7
H
B
IT
D
ESCRIPTIO
................................................................................................... 66
T
ABLE
48: M
ICROPROCESSOR
R
EGISTER
0
X
E8
H
B
IT
D
ESCRIPTION
................................................................................................. 67
CLOCK
SELECT
REGISTER
.............................................................................................................................67
F
IGURE
36. R
EGISTER
0
X
E9
H
S
UB
R
EGISTERS
.............................................................................................................................. 67
T
ABLE
49: M
ICROPROCESSOR
R
EGISTER
0
X
E9
H
B
IT
D
ESCRIPTION
................................................................................................. 68
T
ABLE
50: M
ICROPROCESSOR
R
EGISTER
0
X
EA
H
B
IT
D
ESCRIPTION
................................................................................................. 68
T
ABLE
51: M
ICROPROCESSOR
R
EGISTER
0
X
EB
H
B
IT
D
ESCRIPTION
................................................................................................. 69
T
ABLE
52: R
ECOVERED
C
LOCK
S
ELECT
......................................................................................................................................... 70
T
ABLE
53: E1 A
RBITRARY
S
ELECT
................................................................................................................................................. 71
T
ABLE
54: M
ICROPROCESSOR
R
EGISTER
0
X
FE
H
B
IT
D
ESCRIPTION
................................................................................................. 71
T
ABLE
55: M
ICROPROCESSOR
R
EGISTER
0
X
FF
H
B
IT
D
ESCRIPTION
................................................................................................. 71
8.0 ELECTRICAL CHARACTERISTICS ....................................................................................................72
T
ABLE
56: A
BSOLUTE
M
AXIMUM
R
ATINGS
....................................................................................................................................... 72
T
ABLE
57: DC D
IGITAL
I
NPUT
AND
O
UTPUT
E
LECTRICAL
C
HARACTERISTICS
.................................................................................... 72
T
ABLE
58: AC E
LECTRICAL
C
HARACTERISTICS
............................................................................................................................... 72
T
ABLE
59: P
OWER
C
ONSUMPTION
.................................................................................................................................................. 73
T
ABLE
60: E1 R
ECEIVER
E
LECTRICAL
C
HARACTERISTICS
................................................................................................................ 73
T
ABLE
61: T1 R
ECEIVER
E
LECTRICAL
C
HARACTERISTICS
................................................................................................................ 74
T
ABLE
62: E1 T
RANSMITTER
E
LECTRICAL
C
HARACTERISTICS
.......................................................................................................... 74
T
ABLE
63: T1 T
RANSMITTER
E
LECTRICAL
C
HARACTERISTICS
.......................................................................................................... 75
ORDERING INFORMATION.............................................................................................76
PACKAGE DIMENSIONS (BOTTOM VIEW) ..................................................................76
R
EVISION
H
ISTORY
.......................................................................................................................................77