參數(shù)資料
型號(hào)： XRT83L34
廠商： Exar Corporation
英文描述： QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述： 四T1/E1/J1收發(fā)左/上海收發(fā)器和時(shí)鐘恢復(fù)和抖動(dòng)衰減器
文件頁數(shù)： 54/82頁
文件大小： 447K
代理商： XRT83L34
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.3.4
51
T
ABLE
22: M
ICROPROCESSOR
R
EGISTER
#3, B
IT
D
ESCRIPTION
R
EGISTER
A
DDRESS
0000011
0010011
0100011
0110011
C
HANNEL
_n
C
HANNEL
_0
C
HANNEL
_1
C
HANNEL
_2
C
HANNEL
_3
F
UNCTION
R
EGISTER
T
YPE
R
ESET
V
ALUE
B
IT
#
N
AME
D7
NLCDE1_n
Network Loop Code Detection Enable Bit 1:
This bit together with NLCDE0_n control the Loop-Code detec-
tion of each channel.
When NLCDE1 =”0” and NLCDE0 = “1” or NLCDE1 = “1” and
NLCDE0 = “0”, the chip is manually programmed to monitor
the receive data for the Loop-Up or Loop-Down code respec-
tively.When the presence of the “00001” or “001” pattern is
detected for more than 5 seconds, the status of the NLCD bit is
set to “1” and if the NLCD interrupt is enabled, an interrupt is
initiated.The Host has the option to control the Loop-Back
function manually.
Setting the NLCDE1 = “1” and NLCDE0 = “1” enables the
Automatic Loop-Code detection and Remote Loop-Back acti-
vation mode. As this mode is initiated, the state of the NLCD
interface bit is reset to “0” and the chip is programmed to mon-
itor the receive data for the Loop-Up code. If the “00001” pat-
tern is detected for longer than 5 seconds, the NLCD bit is set
“1”, Remote Loop-Back is activated and the chip is automati-
cally programmed to monitor the receive data for the Loop-
Down code. The NLCD bit stays set even after the chip stops
receiving the Loop-Up code. The Remote Loop-Back condition
is removed when the chip receives the Loop-Down code for
more than 5 seconds or if the Automatic Loop-Code detection
mode is terminated.
R/W
0
D6
NLCDE0_n
Network Loop Code Detection Enable Bit 0:
See description of D7 for function of this bit.
R/W
0
D5
CODES_n
Encoding and Decoding Select:
Writing a “0” to this bits selects HDB3 or B8ZS encoding and
decoding for channel number n. Writing “1” selects an AMI
coding scheme. This bit is only active when single rail mode is
selected.
R/W
0
NLCDE1
NLCDE0
0
0
0
1
1
0
1
1
Function
Disable Loop-code
detection
Detect Loop-Up code
in receive data
Detect Loop-Down
code in receive data
Automatic Loop-Code
detection
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT83L34_05 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
XRT83L34ES 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83L34IV 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT83L34IV-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT83L34IVTR 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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