參數(shù)資料
型號: XRT83L34
廠商: Exar Corporation
英文描述: QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述: 四T1/E1/J1收發(fā)左/上海收發(fā)器和時鐘恢復(fù)和抖動衰減器
文件頁數(shù): 19/82頁
文件大?。?/td> 447K
代理商: XRT83L34
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.4
PRELIMINARY
16
EQC4
EQC3
EQC2
EQC1
EQC0
A[4]
A[3]
A[2]
A[1]
A[0]
59
60
61
62
63
59
60
61
62
63
I
Equalizer Control Input 4 - Hardware Mode
This pin together with EQC[3:0] are used for controlling the transmit pulse
shaping, transmit line build-out (LBO), receive monitoring and also to select
T1, E1 or J1 Modes of operation. See Table 4 for description of Transmit
Equalizer Control bits.
Equalizer Control Input 3
Equalizer Control Input 2
Equalizer Control Input 1
Equalizer Control Input 0
N
OTES
:
1.
In
Hardware mode
all transmit channels share the same pulse
setting controls function.
2.
All channels of an XRT83L34 must operate at the same clock rate,
either the T1, E1 or J1 modes.
Microprocessor Address bits [4:0] - Host Mode
See “Microprocessor Address Pins - Host mode:” on page 11.
N
OTE
:
Internally pulled “Low” with a 50k
resistor for all channels.
RXTSEL
110
I
Receiver Termination Select
In Hardware mode, when this pin is “Low” the receive line termination is
determined only by the external resistor. When “High”, the receive termina-
tion is realized by internal resistors or the combination of internal and exter-
nal resistors. These conditions are described in the table below.
N
OTE
:
In
Hardware mode
all channels share the same RXTSEL control
function.
In
Host mode
, the RXTSEL_n bits in the channel control registers deter-
mines if the receiver termination is external or internal. However the function
of RXTSEL can be transferred to the Hardware pin by setting the TERCNTL
bit (bit 4) to “1” in the register 66 address hex 0x42.
N
OTE
:
Internally pulled “Low” with a 50k
resistor.
TXTSEL
111
I
Transmit Termination Select - Hardware Mode
When this pin is “Low” the transmit line termination is determined only by an
external resistor. When “High”, the transmit termination is realized only by
the internal resistor.
N
OTES
:
1.
2.
This pin is internally pulled "Low" with a 50k
resistor.
In
Hardware Mode
all channels share the same TXTSEL control
function.
S
IGNAL
N
AME
P
IN
#
T
YPE
D
ESCRIPTION
RXTSEL
RX Termination
0
1
External
Internal
TXTSEL
TX Termination
0
1
External
Internal
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