
System Interface Unit
12-26
MPC801 USER’S MANUAL
MOTOROLA
12
12.12.2.5 REAL-TIME CLOCK STATUS AND CONTROL REGISTER.
The real-time
clock status and control register (RTCSC) is used to enable the different real-time clock
functions and to report interrupt sources. A status bit is cleared by writing a 1 (writing a zero
has no effect) and more than one status bit can be cleared at a time. This register can be
read at any time.
RTCIRQ—Real-Time Clock Interrupt Request
This field controls the real-time clock interrupt priority level. Refer to
Section 12.3.1
Configuring the Interrupt
for details.
SEC—Once Per Second Interrupt
This status bit is set every second and should be cleared by the software.
ALR—Alarm Interrupt
This status bit is set when the value of the real-time clock is equal to the value programmed
in the alarm register.
38K—Real-Time Clock Source Select
If this bit is negated (0), the real-time clock assumes that it is driven by 32.768KHz to
generate the second pulse and if it is asserted, the real-time clock assumes 38.4KHz. This
bit is not affected by reset.
SIE—Second Interrupt Enable
If this bit is asserted (1), the real-time clock generates an interrupt when the SEC bit is
asserted.
ALE—ALarm Interrupt Enable
If this bit is asserted (1), the real-time clock generates an interrupt when the ALR bit is
asserted.
RTF—Real-Time Clock Freeze
If this bit is asserted (1), the real-time clock stops while freeze is asserted.
RTE—Real-Time Clock Enable
If this bit is set, the real-time clock timers are enabled. This bit is not affected by reset.
RTCSC
BIT
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
FIELD
RTCIRQ
SEC
ALR
RES
38K
SIE
ALE
RTF
RTE
RESET
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W