參數(shù)資料
型號(hào)： XC3S1400AN-4FGG484I
廠商： Xilinx Inc
文件頁數(shù)： 10/123頁
文件大小： 0K
描述： IC FPGA SPARTAN-3AN 484FPGA
標(biāo)準(zhǔn)包裝： 60
系列： Spartan®-3AN
LAB/CLB數(shù)： 2816
邏輯元件/單元數(shù)： 25344
RAM 位總計(jì)： 589824
輸入/輸出數(shù)： 372
門數(shù)： 1400000
電源電壓： 1.14 V ~ 1.26 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 484-BBGA
供應(yīng)商設(shè)備封裝： 484-FBGA
Spartan-3AN FPGA Family: Pinout Descriptions
DS557 (v4.1) April 1, 2011
Product Specification
107
User I/Os by Bank
Table 79 and Table 80 indicate how the user-I/O pins are distributed between the four I/O banks on the FGG484 package.
The AWAKE pin is counted as a dual-purpose I/O.
Footprint Migration Differences
Table 81 summarizes the three footprint and functionality differences between the XC3S700AN and the XC3S1400AN
FPGAs that can affect migration between devices available in the FGG484 package. All other pins unconditionally migrate
between the Spartan-3AN devices available in the FGG484 package.
Spartan-3AN FPGAs are pin compatible with the same density Spartan-3A FPGAs in the FG(G)484 package, although the
Spartan-3A FPGAs require an external configuration source.
In Table 81, the arrow (
) indicates that this pin can unconditionally migrate from the device on the left to the device on the
right. Migration in the other direction is possible depending on how the pin is configured for the device on the right.
Table 79: User I/Os Per Bank for the XC3S700AN in the FGG484 Package
Package
Edge
I/O Bank
Maximum I/Os
All Possible I/O Pins by Type
I/O
INPUT
DUAL
VREF
CLK
Top
0
92
58
17
1
8
Right
1
94
33
15
30
8
Bottom
2
92
43
11
21
9
8
Left
3
94
61
17
0
8
Total
372
195
60
52
33
32
Table 80: User I/Os Per Bank for the XC3S1400AN in the FGG484 Package
Package
Edge
I/O Bank
Maximum I/Os
All Possible I/O Pins by Type
I/O
INPUT
DUAL
VREF
CLK
Top
0
92
58
17
1
8
Right
1
94
33
15
30
8
Bottom
2
95
43
13
21
10
8
Left
3
94
61
17
0
8
Total
375
195
62
52
34
32
Table 81: FGG484 XC3S700AN to XC3S1400AN Footprint Migration/Differences
FGG484 Ball
Bank
XC3S700AN
Migration
XC3S1400AN
T8
2
N.C.
INPUT/VREF
U7
2
N.C.
INPUT
U16
2
N.C.
INPUT
Number of Differences:
3
相關(guān)PDF資料
PDF描述
7-745129-4 CONN FERRULE CRIMP DB 3,5
5748271-1 CONN SCREW LOCKS FMALE KIT 4-40
7-745129-9 CONN FERRULE CRIMP DB9,15,50
1-750877-9 CONN TERM COVER 100POS .050
ABB100DHLD CONN EDGECARD 200PS .050 DIP SLD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC3S1400AN-4FGG676C 功能描述:IC SPARTAN-3AN FPGA 1400K 676FBG RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-3AN 標(biāo)準(zhǔn)包裝:60 系列:XP LAB/CLB數(shù):- 邏輯元件/單元數(shù):10000 RAM 位總計(jì):221184 輸入/輸出數(shù):244 門數(shù):- 電源電壓:1.71 V ~ 3.465 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:388-BBGA 供應(yīng)商設(shè)備封裝:388-FPBGA（23x23） 其它名稱:220-1241
XC3S1400AN-4FGG676CES 制造商:Xilinx 功能描述:
XC3S1400AN-4FGG676I 功能描述:IC FPGA SPARTAN-AN 1400K 676FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Spartan®-3AN 標(biāo)準(zhǔn)包裝:40 系列:Spartan® 6 LX LAB/CLB數(shù):3411 邏輯元件/單元數(shù):43661 RAM 位總計(jì):2138112 輸入/輸出數(shù):358 門數(shù):- 電源電壓:1.14 V ~ 1.26 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:676-BGA 供應(yīng)商設(shè)備封裝:676-FBGA（27x27）
XC3S1400AN-5FG484C 制造商:Xilinx 功能描述:SPARTAN3AN - Trays 制造商:Xilinx 功能描述:IC FPGA 372 I/O 484FBGA
XC3S1400AN-5FG676C 制造商:Xilinx 功能描述:FPGA SPARTAN-3AN FAMILY 1.4M GATES 25344 CELLS 770MHZ 90NM T - Trays 制造商:Xilinx 功能描述:IC FPGA 502 I/O 676FBGA 制造商:Xilinx 功能描述:IC SPARTAN-3AN FPGA 1400K 676BGA
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*