參數(shù)資料
型號(hào)： W25Q32DWZPIP
廠商： WINBOND ELECTRONICS CORP
元件分類： PROM
英文描述： 256K X 16 SPI BUS SERIAL EEPROM, 7.5 ns, PDSO8
封裝： 6 X 5 MM, GREEN, WSON-8
文件頁(yè)數(shù)： 36/82頁(yè)
文件大?。?/td> 1155K
代理商： W25Q32DWZPIP
W25Q32DW
Publication Release Date: January 18, 2011
- 41 -
Preliminary - Revision C
10.2.19 Set Burst with Wrap (77h)
In Standard SPI mode, the Set Burst with Wrap (77h) instruction is used in conjunction with “Fast Read
Quad I/O” and “Word Read Quad I/O” instructions to access a fixed length of 8/16/32/64-byte section
within a 256-byte page. Certain applications can benefit from this feature and improve the overall system
code execution performance.
Similar to a Quad I/O instruction, the Set Burst with Wrap instruction is initiated by driving the /CS pin low
and then shifting the instruction code “77h” followed by 24 dummy bits and 8 “Wrap Bits”, W7-0. The
instruction sequence is shown in Figure 18. Wrap bit W7 and the lower nibble W3-0 are not used.
W6, W5
W4 = 0
W4 =1 (DEFAULT)
Wrap Around
Wrap Length
Wrap Around
Wrap Length
0
Yes
8-byte
No
N/A
0
1
Yes
16-byte
No
N/A
1
0
Yes
32-byte
No
N/A
1
Yes
64-byte
No
N/A
Once W6-4 is set by a Set Burst with Wrap instruction, all the following “Fast Read Quad I/O” and “Word
Read Quad I/O” instructions will use the W6-4 setting to access the 8/16/32/64-byte section within any
page. To exit the “Wrap Around” function and return to normal read operation, another Set Burst with
Wrap instruction should be issued to set W4 = 1. The default value of W4 upon power on is 1. In the case
of a system Reset while W4 = 0, it is recommended that the controller issues a Set Burst with Wrap
instruction to reset W4 = 1 prior to any normal Read instructions since W25Q32DW does not have a
hardware Reset Pin.
In QPI mode, the “Burst Read with Wrap (0Ch)” instruction should be used to perform the Read operation
with “Wrap Around” feature. The Wrap Length set by W5-4 in Standard SPI mode is still valid in QPI
mode and can also be re-configured by “Set Read Parameters (C0h)” instruction. Refer to 10.2.38 and
10.2.39 for details.
Wrap Bit
/CS
CLK
Mode 0
Mode 3
0
1
IO
0
IO
1
IO
2
IO
3
2
3
4
5
X
don't
care
6
7
8
9
don't
care
don't
care
10
11
12
13
14
15
Instruction (77h)
Mode 0
Mode 3
X
w4
X
w5
X
w6
X
Figure 18. Set Burst with Wrap Instruction (SPI Mode only)
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