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參數(shù)資料
| 型號： | W19B160BTBBM |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 1M X 16 FLASH 2.7V PROM, 11 ns, PBGA48 |
| 封裝： | 6 X 8 MM, 0.80 MM PITCH, LEAD FREE, TFBGA-48 |
| 文件頁數(shù)： | 3/48頁 |
| 文件大?。?/td> | 534K |
| 代理商： | W19B160BTBBM |
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W19B160BT/B DATA SHEET
Publication Release Date:Jan.04, 2008
- 11 -
Revision A5
To access the auto select codes in-system, the host system can issue the auto select command
through the command register. This method does not require VID. Also refer to the auto select
Command Sequence section for more information.
6.1.10 Sector Protection and Un-protection
The sector protection feature will disable both program and erase operations in any sectors. The
sector un-protection feature will re-enables both program and erase operations in previously protected
sectors. Sector protection / un-protection can be implemented through two methods.
The primary method requires VID on the #RESET pin, and can be implemented either in-system or
through programming equipment. This method uses standard microprocessor bus cycle timing.
The alternate method intended only for programming equipment requires VID on address pin A9 and
#OE It is possible to determine whether a sector is protected or unprotected. See the auto select
Mode section for details.
6.1.11 Temporary Sector Unprotect
This feature allows temporary un-protection of previously protected sectors to change data in-system.
When the #RESET pin is set to VID, the Sector Unprotect mode is activated. During this mode,
formerly protected sectors can be programmed or erased by selecting the sector addresses. What if
VID is removed from the #RESET pin, all the previously protected sectors are protected again.
6.1.12 Hardware Data Protection
The command sequence requirements of unlock cycles for programming or erasing provides data
protection against negligent writes. In addition, the following hardware data protection measures
prevent inadvertent erasure or programming, which might be caused by spurious system level signals
during VDD power-up and power-down transitions, or from system noise.
6.1.13 Write Pulse “Glitch” Protection
Noise pulses, which is less than 5nS (typical) on #OE, #CE or #WE, do not initiate a write cycle.
6.1.14 Logical Inhibit
Write cycles are inhibited by holding any one of #OE = VIL, #CE = VIH or #WE = VIH. #CE and #WE
must be a logical zero while #OE is a logical one to initiate a write cycle.
6.1.15 Power-Up Write Inhibit
During power up, if #WE = #CE = VIL and #OE = VIH, the device does not accept commands on the
rising edge of #WE. The internal state machine is automatically reset to the read mode on power-up.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| W19B160BTBH7H | 制造商:WINBOND 制造商全稱:Winbond 功能描述:16Mbit, 2.7~3.6 volt CMOS flash memory |
| W19B160BTBM7H | 制造商:WINBOND 制造商全稱:Winbond 功能描述:16Mbit, 2.7~3.6 volt CMOS flash memory |
| W19B160BTT7H | 制造商:WINBOND 制造商全稱:Winbond 功能描述:2.7~3.6-volt write (program and erase) operations, Fast write operation |
| W19B160TB7H7H | 制造商:WINBOND 制造商全稱:Winbond 功能描述:16Mbit, 2.7~3.6 volt CMOS flash memory |
| W19B160TB7M7H | 制造商:WINBOND 制造商全稱:Winbond 功能描述:16Mbit, 2.7~3.6 volt CMOS flash memory |
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