
VT8231
Preliminary Revision 0.8
October 29, 1999
-
58-
Function 0 Registers - PCI to ISA Bridge
7HFKQRORJLHV,QF
:H &RQQHFW
Offset 42 - ISA Clock Control. ......................................... RW
7
Latch IO16#
0
Enable (recommended setting)...............default
1
Disable
6
MCS16# Output
0
Disable ...................................................default
1
Enable
5
Master Request Test Mode
(do not program)
0
Disable ...................................................default
1
Enable
4
Reserved (Do Not Program)
................... default = 0
3
ISA Clock (BCLK) Select Enable
0
BCLK = PCICLK/4................................default
1
BCLK selected per bits 2-0
2-0
ISA Bus Clock Select
(if bit-3 = 1)
000 BCLK = PCICLK/3................................default
001 BCLK = PCICLK/2
010 BCLK = PCICLK/4
011 BCLK = PCICLK/6
100 BCLK = PCICLK/5
101 BCLK = PCICLK/10
110 BCLK = PCICLK/12
111 BCLK = OSC
Note: Procedure for ISA Clock switching:
1) Set bit 3 to 0; 2) Change value of bit 2-0; 3) Set bit 3 to 1
Offset 43 - ROM Decode Control .................................... RW
Setting these bits enables the indicated address range to be
included in the ROMCS# decode:
7
FFFE0000h-FFFEFFFFh
..........................default=0
6
FFF80000h-FFFDFFFFh
..........................default=0
5
FFF00000h-FFF7FFFFh
............................default=0
4
000E0000h-000EFFFFh
.............................default=0
3
000D8000h-000DFFFFh
............................default=0
2
000D0000h-000D7FFFh
............................default=0
1
000C8000h-000CFFFFh
............................default=0
0
000C0000h-000C7FFFh
.............................default=0
Offset 44 - Keyboard Controller Control ....................... RW
7
KBC Timeout Test
(do not program)........default = 0
6-4
Reserved
(do not program)........................default = 0
3
Mouse Lock Enable
0
Disable...................................................default
1
Enable
2-1
Reserved
(do not program)........................default = 0
0
Reserved
(no function) ..............................default = 0
Offset 45 - Type F DMA Control .................................... RW
7
ISA Master / DMA to PCI Line Buffer
0
Disable...................................................default
1
Enable
6
DMA type F Timing on Channel 7
............default=0
5
DMA type F Timing on Channel 6
............default=0
4
DMA type F Timing on Channel 5
............default=0
3
DMA type F Timing on Channel 3
............default=0
2
DMA type F Timing on Channel 2
............default=0
1
DMA type F Timing on Channel 1
............default=0
0
DMA type F Timing on Channel 0
............default=0