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| 型號(hào)： | VT8231 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 晶體 |
| 英文描述： | CRYSTAL 8.00MHZ 18PF SMD |
| 中文描述： | 南橋伏特，PC99柔順 |
| 文件頁(yè)數(shù)： | 38/132頁(yè) |
| 文件大?。?/td> | 1210K |
| 代理商： | VT8231 |
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VT8231
Preliminary Revision 0.8
October 29, 1999
-32-
Register Overview
7HFKQRORJLHV,QF
:H &RQQHFW
PCI Function 0 Registers
–
PCI-to-ISA Bridge
Configuration Space PCI-to-ISA Bridge Header Registers
Offset PCI Configuration Space Header
1-0
Vendor ID
3-2
Device ID
5-4
Command
7-6
Status
8
Revision ID
9
Programming Interface
A
Sub Class Code
B
Base Class Code
C
-reserved- (cache line size)
D
-reserved- (latency timer)
E
Header Type
F
Built In Self Test (BIST)
10-27 -reserved- (base address registers)
28-2B -reserved- (unassigned)
2F-2C Subsystem ID Read
30-33 -reserved- (expan. ROM base addr)
34-3B -reserved- (unassigned)
3C
-reserved- (interrupt line)
3D
-reserved- (interrupt pin)
3E
-reserved- (min gnt)
3F
-reserved- (max lat)
Default
1106
8231
0087
0200
nn
00
01
06
00
00
80
00
00
00
00
00
00
00
00
00
00
Acc
RO
RO
RW
WC
RO
RO
RO
RO
—
—
RO
RO
—
—
RO
—
—
—
—
—
—
Configuration Space PCI-to-ISA Bridge-Specific Registers
Offset ISA Bus Control
40
ISA Bus Control
41
ISA Test Mode
42
ISA Clock Control
43
ROM Decode Control
44
Keyboard Controller Control
45
Type F DMA Control
46
Miscellaneous Control 1
47
Miscellaneous Control 2
48
Miscellaneous Control 3
49
-reserved-
4A
IDE Interrupt Routing
4B
-reserved-
4C
DMA / Master Mem Access Control 1
4D
DMA / Master Mem Access Control 2
4F-4E DMA / Master Mem Access Control 3
Default
00
00
00
00
00
00
00
00
01
00
04
00
00
00
0300
Acc
RW
RW
RW
RW
RW
RW
RW
RW
RW
—
RW
—
RW
RW
RW
Offset Plug and Play Control
50
PnP DMA Request Control
51
PnP Routing for LPT / FDC IRQ
52
PnP Routing for COM2 / COM1 IRQ
53
-reserved-
54
PCI IRQ Edge / Level Select
55
PnP Routing for PCI INTA
56
PnP Routing for PCI INTB-C
57
PnP Routing for PCI INTD
58
-reserved-
59
-reserved-
5A
KBC / RTC Control
5B
Internal RTC Test Mode
5C
DMA Control
5D-5E -reserved-
5F
-reserved- (do not program)
Bit 7-4 power-up default depends on external strapping
Default
2D
00
00
00
00
00
00
00
00
04
x4
00
00
00
04
Acc
RW
RW
RW
—
RW
RW
RW
RW
—
—
RW
RW
RW
—
RW
Offset Distributed DMA
61-60 Channel 0 Base Address / Enable
63-62 Channel 1 Base Address / Enable
65-64 Channel 2 Base Address / Enable
67-66 Channel 3 Base Address / Enable
69-68 Serial IRQ Control
6B-6A Channel 5 Base Address / Enable
6D-6C Channel 6 Base Address / Enable
6F-6E Channel 7 Base Address / Enable
Default
0000
0000
0000
0000
0000
0000
0000
0000
Acc
RW
RW
RW
RW
RW
RW
RW
RW
Offset Miscellaneous
70
Subsystem ID Write
71-73 -reserved-
74
GPIO Control 1
75
GPIO Control 2
76
GPIO Control 3
77
GPIO Control 4
79-78 PCS0# I/O Port Address
7B-7A PCS1# I/O Port Address
7D-7C PCI DMA Channel Enable
7F-7E 32-Bit DMA Control
80
Programmable Chip Select Mask
81
ISA Positive Decoding Control 1
82
ISA Positive Decoding Control 2
83
ISA Positive Decoding Control 3
84
ISA Positive Decoding Control 4
85
Extended Function Enable
86-87 PnP IRQ/DRQ Test (do not program)
88
PLL Test
89
PLL Control
8A
PCS2/3 I/O Port Address Mask
8B
PCS Control
8D-8C PCS2# I/O Port Address
8F-8E PCS3# I/O Port Address
90-FF -reserved-
Default
00
00
00
00
00
00
0000 0000 RW
0000 0000 RW
0000
0000
00
00
00
00
00
00
00
00
00
00
00
0000
0000
00
Acc
WO
—
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
—
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