參數(shù)資料
型號(hào)： VT8231
廠商： Electronic Theatre Controls, Inc.
元件分類： 晶體
英文描述： CRYSTAL 8.00MHZ 18PF SMD
中文描述： 南橋伏特，PC99柔順
文件頁數(shù)： 103/132頁
文件大?。?/td> 1210K
代理商： VT8231
VT8231
Preliminary Revision 0.8
October 29, 1999
-
97-
Power Management I/O-Space Registers
7HFKQRORJLHV,QF
:H &RQQHFW
I/O Offset 2D-2C - Global Control (GBL_CTL) ............ RW
15-12 Reserved
........................................ always reads 0
11
IDE Secondary Bus Power-Off
0
Disable ...................................................default
1
Enable
10
IDE Primary Bus Power-Off
0
Disable ...................................................default
1
Enable
9
Reserved
........................................ always reads 0
8
SMI Active (INSMI)
0
SMI Inactive...........................................default
1
SMI Active. If the SMIIG bit is set, this bit
needs to be written with a 1 to clear it before
the next SMI can be generated.
7
LID Triggering Polarity
0
Rising Edge............................................default
1
Falling Edge
6
THRM# Triggering Polarity
0
Rising Edge............................................default
1
Falling Edge
5
Battery Low Resume Disable
0
Enable resume........................................default
1
Disable
resume
BATLOW# is asserted
4
SMI Lock (SMIIG)
0
Disable SMI Lock
1
Enable SMI Lock (SMI low to gate for the
next SMI) ...............................................default
3
Wait for Halt / Stop Grant Cycle for CPUSTP#
Assertion
0
Don
’
t wait...............................................default
1
Wait
This bit works with Rx4C[7] of PCI configuration
space to control the start of CPUSTP# assertion.
2
Power Button Triggering Select
0
SCI/SMI generated by PWRBTN# rising edge
.....................................................default
1
SCI/SMI generated by PWRBTN# low level
Set to zero to avoid the situation where PB_STS is set
to wake up the system then reset again by
PBOR_STS to switch the system into the soft-off
state.
1
BIOS Release (BIOS_RLS)
This bit is set by legacy software to indicate release
of the SCI/SMI lock. Upon setting of this bit,
hardware automatically sets the GBL_STS bit. This
bit is cleared by hardware when the GBL_STS bit
cleared by software.
Note that if the GBL_EN bit is set (bit-5 of the Power
Management Enable register at offset 2), then setting
this bit causes an SCI to be generated (because setting
this bit causes the GBL_STS bit to be set).
0
SMI Enable (SMI_EN)
0
Disable all SMI generation.....................default
1
Enable SMI generation
from
suspend
when
I/O Offset 2F - SMI Command (SMI_CMD) ................. RW
7-0
SMI Command
Writing to this port sets the SW_SMI_STS bit. Note
that if the SW_SMI_EN bit is set (see bit-6 of the
Global Enable register at offset 2Ah), then an SMI is
generated.
相關(guān)PDF資料
PDF描述
VT82885(24DIP) Real-Time Clock
VT82885(28PLCC) Real-Time Clock
VT82887 Real-Time Clock
VT82885 Real Time Clock
VT82C42 VT82C42 Keyboard Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VT82885 制造商:未知廠家 制造商全稱:未知廠家 功能描述:electrical characteristics, bus timing and pin descriptions follows.
VT82885(24DIP) 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Real-Time Clock
VT82885(28PLCC) 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Real-Time Clock
VT82887 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Real Time Clock
VT82A192 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*