
VT8231
Preliminary Revision 0.8
October 29, 1999
-
116-
Function 5 & 6 Registers - AC97 Audio & Modem Codecs
7HFKQRORJLHV,QF
:H &RQQHFW
Offset E3-E0
–
AC97 Controller Command / Status ..... RW
31-30 Codec ID
.........................................................RW
00 Select Primary Codec
01 Select Secondary Codec 01
10 Select Secondary Codec 10
11 -reserved-
29
Reserved
........................................ always reads 0
28
AC97 Controller Busy
.........................................RO
0
Primary Codec is ready for a register access
command
1
AC97 Controller is sending a command to the
primary codec (commands are not accepted)
27
Reserved
........................................ always reads 0
26
Secondary Codec 2 Data / Status Valid
...........RWC
0
Not Valid
1
Valid (OK to Read bits 0-23)
25
Secondary Codec 1 Data / Status Valid
...........RWC
0
Not Valid
1
Valid (OK to Read bits 0-23)
24
Primary Codec Data / Status Valid
.................RWC
0
Not Valid
1
Valid (OK to Read bits 0-23)
23
Codec Command Register Read/Write Mode
..RW
0
Select Codec command register write mode
1
Select Codec command register read mode
22-16 Codec Command Register Index [7:1]
..............RW
Index of the AC97 codec command register to access
(in the attached codec). Data must be written before
or at the same time as Index as writing to the index
triggers the AC97 controller to access the addressed
codec register over the AC-link interface.
15-0 Codec Command Register Data / Status
...........RW
W Codec Command Register Data
R
Codec Status Register Data
Offset F3-F0
–
SGD Status Shadow ................................. RO
31
Reserved
........................................always reads 0
30
Write Chan 1 SGD STOP Shadow...........(Rx70[2])
29
Write Chan 1 SGD EOL Shadow.............(Rx70[1])
28
Write Chan 1 SGD FLAG Shadow..........(Rx70[0])
27
Reserved
........................................always reads 0
26
Write Chan 0 SGD STOP Shadow...........(Rx60[2])
25
Write Chan 0 SGD EOL Shadow.............(Rx60[1])
24
Write Chan 0 SGD FLAG Shadow..........(Rx60[0])
23
22
21
20
19
18
17
16
Reserved
FM Read Chan SGD STOP Shadow .......(Rx50[2])
FM Read Chan SGD EOL Shadow .........(Rx50[1])
FM Read Chan SGD FLAG Shadow.......(Rx50[0])
Reserved
........................................always reads 0
3D Read Chan SGD STOP Shadow.........(Rx40[2])
3D Read Chan SGD EOL Shadow...........(Rx40[1])
3D Read Chan SGD FLAG Shadow........(Rx40[0])
........................................always reads 0
15
14
13
12
11
10
9
8
Reserved
DX3 Read Chan SGD STOP Shadow......(Rx30[2])
DX3 Read Chan SGD EOL Shadow........(Rx30[1])
DX3 Read Chan SGD FLAG Shadow .....(Rx30[0])
Reserved
........................................always reads 0
DX2 Read Chan SGD STOP Shadow......(Rx20[2])
DX2 Read Chan SGD EOL Shadow........(Rx20[1])
DX2 Read Chan SGD FLAG Shadow .....(Rx20[0])
........................................always reads 0
7
6
5
4
3
2
1
0
Reserved
DX1 Read Chan SGD STOP Shadow......(Rx10[2])
DX1 Read Chan SGD EOL Shadow........(Rx10[1])
DX1 Read Chan SGD FLAG Shadow .....(Rx10[0])
Reserved
........................................always reads 0
DX0 Read Chan SGD STOP Shadow......(Rx00[2])
DX0 Read Chan SGD EOL Shadow........(Rx00[1])
DX0 Read Chan SGD FLAG Shadow .....(Rx00[0])
........................................always reads 0