- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄202171 > V54C316162VAT10 (MOSEL-VITELIC) 1M X 16 SYNCHRONOUS DRAM, 8 ns, PDSO50 PDF資料下載
參數(shù)資料
| 型號： | V54C316162VAT10 |
| 廠商： | MOSEL-VITELIC |
| 元件分類： | DRAM |
| 英文描述： | 1M X 16 SYNCHRONOUS DRAM, 8 ns, PDSO50 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-50 |
| 文件頁數(shù)： | 5/61頁 |
| 文件大?。?/td> | 916K |
| 代理商： | V54C316162VAT10 |
第1頁第2頁第3頁第4頁當(dāng)前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁
13
V54C316162VA Rev. 1.0 January 1998
MOSEL VITELIC
V54C316162VA
Notes:
1.
An initial pause of 200
s is required after power-up, then a Precharge All Banks command must be given followed
by 8 Auto Refresh (CBR) cycles before the Mode Register Set Operation can begin.
2.
AC timing tests have VIL = 0.8V and VIH = 2.0V with the timing referenced to the 1.4 V crossover point. The transition
time is measured between VIH and VIL. All AC measurements assume tT=1ns with the AC output load circuit shown
in Figure 1.
3.
Any time that the refresh Period has been exceeded, a minimum of two Auto (CRB) Refresh commands must be
given to “wake-up“ the device.
4.
Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after CKE returns high.
Self Refresh Exit is not complete until a time period equal to tRC is satisfied once the Self Refresh Exit command
is registered.
5.
Referenced to the time which the output achieves the open circuit condition, not to output voltage levels.
1.4V
tSETUP
tHOLD
tAC
tLZ
tOH
tHZ
CLOCK
INPUT
OUTPUT
50 pF
I/O
Z=50 Ohm
+ 1.4 V
50 Ohm
2.0V
0.8V
tT
Figure 1.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V54C3256164VAT6 | 16M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| V54C3256404VDS8IPC | 64M X 4 SYNCHRONOUS DRAM, 6 ns, PBGA60 |
| V54C3256404VDUG7 | 64M X 4 SYNCHRONOUS DRAM, 5.4 ns, PBGA54 |
| V54C3256404VDLJ6 | 64M X 4 SYNCHRONOUS DRAM, 5.4 ns, PBGA60 |
| V54C3256404VDUI6 | 64M X 4 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| V54C316162VC | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
| V54C316162VC-5 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
| V54C316162VC-55 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
| V54C316162VC-6 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
| V54C316162VC-7 | 制造商:MOSEL 制造商全稱:MOSEL 功能描述:200/183/166/143 MHz 3.3 VOLT, 2K REFRESH ULTRA HIGH PERFORMANCE 1M X 16 SDRAM 2 BANKS X 512Kbit X 16 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。