- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383983 > UPD72042 (NEC Corp.) LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL PDF資料下載
參數(shù)資料
| 型號： | UPD72042 |
| 廠商： | NEC Corp. |
| 英文描述： | LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL |
| 中文描述： | LSI器件間設(shè)備BusTM（IEBusTM）協(xié)議控制 |
| 文件頁數(shù)： | 84/92頁 |
| 文件大小： | 373K |
| 代理商： | UPD72042 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁當(dāng)前第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
μ
PD72042
84
Data Sheet S14870EJ1V0DS00
Oscillator circuit (External system clock)
Caution When using system clock oscillator, wire the portion enclosed in broken lines in the figure as
follows to avoid adverse influences on the wiring capacitance:
Keep the wiring length as short as possible.
Do not cross the wiring over the other signal lines.
Do not route the wiring in the vicinity of lines through which a high fluctuating current flows.
Always keep the ground point of the capacitor of the oscillator circuit at the same potential
as GND.
Do not connect the power source pattern through which a high current flows.
Do not extract signals from the oscillator.
IEBus DRIVER/RECEIVER CHARACTERISTICS
(T
A
= –40 to +85
°
C, V
DD
= 5 V
±
10%)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
Output high voltage
I
ON
R
L
= 60
±
5%
2.73
6.22
mA
Output low voltage
I
OL
1.0
μ
A
Common mode output voltage
V
OCOM
For high and low levels
X = 1/2V
DD
X–0.25 1/2V
DD
X+0.25
V
Input high voltage
V
IH
120
mV
Input low voltage
V
IL
20.0
mV
Input hysteresis voltage
V
IHYS
25
mV
Common mode input voltage, high
V
IHCOM
1.00
V
DD
–1.0
V
Common mode input voltage, low
V
ILCOM
0
V
DD
V
Driver output resistance
R
O
Between BUS+ and BUS–
100
k
Driver output capacitance
C
O
25
pF
Receiver input capacitance
C
I
25
pF
Between BUS+ and BUS–,
between BUS+ and GND,
and between BUS– and GND
X1
XO
C1
C2
GND
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPD72042GT | LSI DEVICES FOR Inter Equipment BusTM (IEBusTM) PROTOCOL CONTROL |
| uPD72107GC-3B9 | LAP-B CONTROLLER(Link Access Procedure Balanced mode) |
| UPD72107 | LAP-B CONTROLLER(Link Access Procedure Balanced mode) |
| uPD72107CW | LAP-B CONTROLLER(Link Access Procedure Balanced mode) |
| uPD72107L | LAP-B CONTROLLER(Link Access Procedure Balanced mode) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD72042BGT-A | 制造商:Renesas Electronics 功能描述:LSI Device 16-Pin SOP 制造商:Renesas Electronics 功能描述:LSI Device 16-Pin SOP Cut Tape |
| UPD72042GT(A) | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD720902AF5-667-JF2-E3-A | 功能描述:IC ADVANCED MEMORY BUFFER D1 RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:* 標(biāo)準(zhǔn)包裝:90 系列:- 應(yīng)用:PCI 至 PCI 橋 接口:PCI 電源電壓:3 V ~ 3.6 V 封裝/外殼:257-LFBGA 供應(yīng)商設(shè)備封裝:257-BGA MICROSTAR（16x16） 包裝:托盤 安裝類型:表面貼裝 產(chǎn)品目錄頁面:882 (CN2011-ZH PDF) 其它名稱:296-19316 |
| UPD72255YF1-GA5-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7225G | 制造商:Panasonic Industrial Company 功能描述:IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。