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參數(shù)資料
| 型號(hào)： | TRK-MPC5634M |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 28/122頁(yè) |
| 文件大小： | 0K |
| 描述： | TRAK 5634M 144PN R2.1 |
| 設(shè)計(jì)資源： | TRK-MPC5634M Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MPC56xx |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | MPC5634M |
| 所含物品： | 板，線纜，CD，DVD |
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Overview
MPC5634M Microcontroller Data Sheet, Rev. 9
Freescale Semiconductor
13
Each of the three modes may be run with a crystal oscillator or an external clock reference
Programmable frequency modulation
— Modulation enabled/disabled through software
— Triangle wave modulation up to 100 kHz modulation frequency
— Programmable modulation depth (0% to 2% modulation depth)
— Programmable modulation frequency dependent on reference frequency
Lock detect circuitry reports when the PLL has achieved frequency lock and continuously monitors lock status to
report loss of lock conditions
Clock Quality Module
— detects the quality of the crystal clock and cause interrupt request or system reset if error is detected
— detects the quality of the PLL output clock. If an error is detected, causes a system reset or switches the system
clock to the crystal clock and causes an interrupt request
Programmable interrupt request or system reset on loss of lock
2.2.6
Calibration EBI
The Calibration EBI controls data transfer across the crossbar switch to/from memories or peripherals attached to the VertiCal
connector in the calibration address space. The Calibration EBI is only available in the VertiCal Calibration System. The
Calibration EBI includes a memory controller that generates interface signals to support a variety of external memories. The
Calibration EBI memory controller supports legacy flash, SRAM, and asynchronous memories. In addition, the calibration EBI
supports up to three regions via chip selects (two chip selects are multiplexed with two address bits), along with programmed
region-specific attributes. The calibration EBI supports the following features:
22-bit address bus (two most significant signals multiplexed with two chip selects)
16-bit data bus
Multiplexed mode with addresses and data signals present on the data lines
NOTE
The calibration EBI must be configured in multiplexed mode when the extended Nexus
trace is used on the VertiCal Calibration System. This is because Nexus signals and address
lines of the calibration bus share the same balls in the calibration package.
Memory controller with support for various memory types:
— Asynchronous/legacy flash and SRAM
— Most standard memories used with the MPC5xx or MPC55xx family
Bus monitor
— User selectable
— Programmable timeout period (with 8 external bus clock resolution)
Configurable wait states (via chip selects)
3 chip-select (Cal_CS[0], Cal_CS[2:3]) signals (Multiplexed with 2 most significant address signals)
2 write/byte enable (WE[0:1]/BE[0:1]) signals
Configurable bus speed modes
— system frequency
— 1/2 of system frequency
— 1/4 of system frequency
Optional automatic CLKOUT gating to save power and reduce EMI
Compatible with MPC5xx external bus (with some limitations)
Selectable drive strengths; 10 pF, 20 pF, 30 pF, 50 pF
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