9t
參數(shù)資料
型號: TRK-MPC5634M
廠商: Freescale Semiconductor
文件頁數(shù): 116/122頁
文件大?。?/td> 0K
描述: TRAK 5634M 144PN R2.1
設(shè)計資源: TRK-MPC5634M Schematic
標(biāo)準(zhǔn)包裝: 1
系列: MPC56xx
類型: MCU
適用于相關(guān)產(chǎn)品: MPC5634M
所含物品: 板,線纜,CD,DVD
Electrical characteristics
MPC5634M Microcontroller Data Sheet, Rev. 9
Freescale Semiconductor
93
Figure 13. Nexus output timing
9tTCYC
CC
D TCK Cycle Time
46,7
—tCYC
9a
tTCYC
CC
D Absolute Minimum TCK Cycle Time
1008
—ns
10
tTDC
CC
D TCK Duty Cycle
40
60
%
11
tNTDIS
CC
D TDI Data Setup Time
5
ns
12
tNTDIH
CC
D TDI Data Hold Time
25
ns
13
tNTMSS
CC
D TMS Data Setup Time
5
ns
14
tNTMSH
CC
D TMS Data Hold Time
25
ns
15
tJOV
CC
D TCK Low to TDO Data Valid
10
20
ns
1 All Nexus timing relative to MCKO is measured from 50% of MCKO and 50% of the respective signal. Nexus timing
specified at VDD = 1.14 V to 1.32 V, VDDEH = 4.5 V to 5.25 V with multi-voltage pads programmed to Low-Swing
mode, TA = TL to TH, and CL = 30 pF with DSC = 0b10.
2 Achieving the absolute minimum MCKO cycle time may require setting the MCKO divider to more than its minimum
setting (NPC_PCR[MCKO_DIV] depending on the actual system frequency being used.
3 This is a functionally allowable feature. However, this may be limited by the maximum frequency specified by the
Absolute minimum MCKO period specification.
4 This may require setting the MCKO divider to more than its minimum setting (NPC_PCR[MCKO_DIV]) depending
on the actual system frequency being used.
5 MDO, MSEO, and EVTO data is held valid until next MCKO low cycle.
6 Achieving the absolute minimum TCK cycle time may require a maximum clock speed (system frequency / 8) that
is less than the maximum functional capability of the design (system frequency / 4) depending on the actual system
frequency being used.
7 This is a functionally allowable feature. However, this may be limited by the maximum frequency specified by the
Absolute minimum TCK period specification.
8 This may require a maximum clock speed (system frequency / 8) that is less than the maximum functional capability
of the design (system frequency / 4) depending on the actual system frequency being used.
Table 37. Nexus debug port timing1 (continued)
#
Symbol
C
Characteristic
Min. Value Max. Value
Unit
1
2
4
6
MCKO
MDO
MSEO
EVTO
Output Data Valid
3
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