參數(shù)資料
型號(hào)： TRC101
廠商： RF Monolithics, Inc.
英文描述： highly integrated single chip
中文描述： 高度集成的單芯片
文件頁(yè)數(shù)： 20/33頁(yè)
文件大?。?/td> 512K
代理商： TRC101
20
Receiver Control Register
(continued)
Bit [7..5] – Receiver Baseband Bandwidth
: These bits set the baseband bandwidth of the demodulated
data. The bandwidth can accommodate different FSK deviations and data rates. See Table 12 for
bandwidth configuration.
Table 12.
Bit [4..3] – Receiver LNA Gain
: These bits set the receiver LNA gain, which can be changed to
accommodate environments with high interferers. The LNA gain also affects the true RSSI value. Refer
to Bit [2..0] for RSSI. See Table 13 below for gain configuration.
Table 13.
Bit [2..0] – Digital RSSI Threshold
: The digital receive signal strength indicator threshold may be set to
indicate that the incoming signal strength is above a preset limit. The result is stored in bit 7 of the status
register. There are eight (8) predefined thresholds that can be set. See Table 14 below for settings.
Table 14.
The RSSI threshold is affected by the LNA gain set value. Calculate the true RSSI set threshold when
the LNA gain is set to a value other than 0 dB as:
RSSI = RSSIthres + |GainLNA|
Baseband BW (kHz)
Resvd
400
340
270
200
134
67
Reserved
BB2
0
0
0
0
1
1
1
1
BB1
0
0
1
1
0
0
1
1
BB0
0
1
0
1
0
1
0
1
LNA GAIN (dB)
0
-14
-6
-20
GAIN1
0
0
1
1
GAIN0
0
1
0
1
RSSI Thresh
-103
-97
-91
-85
-79
-73
-67
-61
RSSI2
0
0
0
0
1
1
1
1
RSSI1
0
0
1
1
0
0
1
1
RSSI0
0
1
0
1
0
1
0
1
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