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參數(shù)資料
| 型號： | TRC101 |
| 廠商： | RF Monolithics, Inc. |
| 英文描述： | highly integrated single chip |
| 中文描述： | 高度集成的單芯片 |
| 文件頁數(shù)： | 15/33頁 |
| 文件大?。?/td> | 512K |
| 代理商： | TRC101 |
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15
Automatic Frequency Adjust Register (
continued)
Bit [5..4] – Allowable Frequency Offset
: These bits select the amount of offset allowable between
Transmitter and Receiver frequencies. The allowable range can be specified as in Table 6 below.
TABLE 6.
where fres is the tuning resolution for each band as follows:
fres: 315 MHz Band = 2.5kHz
433 MHz Band = 2.5kHz
868 MHz Band = 5kHz
916 MHz Band = 7.5kHz
Bit [3] – Manual Frequency Adjustment Strobe
: This bit is the strobe signal that initiates a manual
frequency adjustment sample. When set, a sample of the received signal is compared to the Receiver
LO signal and an offset is calculated. If enabled, this value is written to the Offset Register (See Bit [1])
and added to the frequency control word of the PLL. This bit MUST be reset before initiating another
sample.
Bit [2] – High Accuracy (Fine) Mode
: This bit, when set, switches the frequency adjustment mode to
high accuracy. In this mode the processing time is twice the regular mode, but the uncertainty of the
measurement is significantly reduced.
Bit [1] – Frequency Offset Register Enable
: This bit, when set, enables the offset value calculated by
the offset sample to be added to the frequency control word of the PLL that tunes the desired carrier
frequency.
Bit [0] – Offset Frequency Enable
: This bit, when set, enables the TRC101 to calculate the offset
frequency by the sample taken from the Automatic Frequency Adjustment circuit.
Freq Offset Range
No Limit
+15*fres/-16*fres
+7*fres /-8*fres
+3*fres /-4*fres
RNG1
0
0
1
1
RNG0
0
1
0
1
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