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參數(shù)資料
| 型號： | TRC101 |
| 廠商： | RF Monolithics, Inc. |
| 英文描述： | highly integrated single chip |
| 中文描述： | 高度集成的單芯片 |
| 文件頁數(shù)： | 14/33頁 |
| 文件大?。?/td> | 512K |
| 代理商： | TRC101 |
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14
Automatic Frequency Adjust Register
[POR=C4F7h]
Bit Bit Bit Bit Bit Bit
Bit Bit
15 14 13 12 11 10
9
1
1
0
0
0
1
0
The AFA (Automatic Frequency Adjust) Register configures:
Manual or Automatic frequency offset adjustment
Calculation of the offset value and write to the Status Register
Fine offset adjustment control
The AFA (Automatic Frequency Adjust) Register controls and configures the frequency adjustment range
and mode for keeping the transmitter and receiver frequency locked, providing for an optimal link. The
AFA may be manually controlled by an external processor by asserting a strobe signal to initiate a
sample, or may be setup for automatic operation. The AFA also calculates the offset of the transmit and
receive frequency. This offset value is included in the status register read and the AFA must be disabled
during the status read to ensure reporting good offset accuracy.
Bit [15..8] - Command Code
: These bits are the command code that is sent serially to the processor that
identifies the bits to be written to the Automatic Frequency Adjust Register.
Bit [7..6] – Mode Selection
: These bits select Automatic or Manual operation. When set to Manual
operation, the TRC101 will take a sample when a strobe signal (See Bit [3]) is written to the register.
There are four modes of operation. See Table 5 below for configuration.
TABLE 5.
Mode(0,1)
– The circuit takes a measurement only once after power-up.
Mode(1,0)
– When the Valid Data Detector (VDI) pin is low, indicating poor receiving conditions,
the offset register is automatically cleared. Use this setting when receiving from several different
transmitters that are operating very close to the same frequencies so that the receiver may align
itself on each transmission from a different transmitter.
Mode(1,1)
– This setting is best used when receiving from a single transmitter. The measured
offset value is kept independent of the state of the VDI signal. Once the link is aligned it may be
manually toggled by the user.
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
8
0
AUTO1
AUTO0
RNG1
RNG0
STRB ACCF OFFEN
AFEN
Automatic fOFFSET
Mode
Mode Off
Run Once after Pwr-up
Keep offset during Rcv
ONLY
Keep offset indep of
VDI state
AUTO1
AUTO0
0
0
0
1
1
0
1
1
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