SPRS457E
– MARCH 2009 – REVISED JUNE 2011
Table 6-41. Image Pipe Input Interface (IPIPEIF) Registers (continued)
Address
Acronym
Register Description
54h
RSZ3A
IPIPE I/F Horizontal Resizing Parameter for H3A
58h
INIRSZ3A
IPIPE I/F Initial position of resize for H3A
6.12.1.3 Image Pipe
– Hardware Image Signal Processor (IPIPE)
The Image Pipe (IPIPE) is a programmable hardware image processing module that generates image
data in YCbCr-4:2:2 or YCbCr-4:2:0 formats from raw CCD/CMOS data. An image resizer is also fully
integrated within this module. The IPIPE can also be configured to operate in a resize-only mode, which
allows YCbCr-4:2:2 or YCbCr-4:2:0 to be resized without processing every module in the IPIPE.
The following features are supported by the IPIPE:
12-bit RAW data image processing or 16-bit YCbCr resizing
RGB Bayer pattern for input color filter array; does not support complementary color pattern, stripe
pattern, or Foveon
sensors.
Requires at least eight pixels for horizontal blanking and four lines for vertical blanking. In one shot
mode, 16 blanking lines after processing area are required.
Maximum horizontal and vertical offset of IPIPE processing area from synchronous signal is 65534
Maximum input and output widths up to 2176 pixels wide (1088 for RSZ[2]).
Raw pass-through mode for images wider than 2176 pixels (up to 8190 pixels)
Automatic mirroring of pixels/lines when edge processing is performed so that the width and height is
consistent throughout.
Defect pixel correction using
– Lookup table method that contains row and column position of the pixel to be corrected
– On-the-fly adaptive method
Offset and gain control for white balancing at each color component (WB).
CFA interpolation for good quality CFA interpolation
Programmable RGB to RGB blending matrix (9 coefficients for the 3x3 matrix). (RGB2RGB module)
Separate lookup tables for gamma correction on each of R, G and B components for display through
piece-wise linear interpolation approach
4:4:4 data to 4:2:2 data conversion by chroma low-pass filtering and down sampling to Cb and Cr.
(4:4:4 to 4:2:2 module)
Programmable look-up table for luminance edge enhancement. Adjustable brightness and contrast for
Y component (Edge Enhancer module)
Programmable down or up-sampling filter for both horizontal and vertical directions with range from
1/16x to 16x, in which the filter outputs two images with different magnification simultaneously (Resizer
module)
4:2:2 to 4:2:0 conversion that can be done in the resizing block
Different data formats [YCbCr (4:2:2 or 4:2:0), RGB (32bit/16bit), Raw data] are available while storing
data in the SDRAM from IPIPE
Flipping image horizontally and/or vertically
Programmable histogram engine (4 windows, 256 bins)
Boxcar calculation (1/8 or 1/16 size).
The IPIPE register memory mapping (offsets) is shown in
Table 6-42.
Table 6-42. IPIPE Registers
Offset
Acronym
Register Description
0h
SRC_EN
IPIPE Enable
Copyright
2009–2011, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
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