
SPRS457E
– MARCH 2009 – REVISED JUNE 2011
Table 6-8. Switching Characteristics Over Recommended Operating Conditions for RTC Oscillator
PARAMETER
MIN
TYP
MAX
UNIT
Start-up time (from power up until oscillating at stable frequency)
0.85
2
s
Oscillation frequency
32.768
kHz
Crystal ESR
70
k
Frequency stability
+/- 50
ppm
The load capacitors, C1 and C2, should be chosen such that the equation is satisfied (typical values are
C1 = C2 = 2 fF). CL in the equation is the load specified by the crystal manufacturer. All discrete
components used to implement the oscillator circuit should be placed as close as possible to the
associated oscillator pins (RTCXI and RTCXO) and to the VSS_MX1 pin.
6.7
Power Management and Real Time Clock Subsystem (PRTCSS)
The Power Management and Real Time Clock Subsystem (PRTCSS) is used for calendar applications.
The PRTCSS has an independent power supply and can remain ON while the rest of the power supply is
turned OFF. The PRTCSS supports the following features:
Real Time Clock (RTC)
– Simple day counter (Up to 89-years)
– To generate the Alarm event to check the RTC count
– 16-bit simple timer
– Watch-dog timer to generate the event for RTC-Sequencer
General Purpose I/O with Anti-chattering
– 3-output pins (PWRCTRO[2:0])
– 7-In/Output pins (PWRCTRIO[6:0])
Interrupt
– 2 RTCSS interrupts (ARMSS and Timer)
– 7 GPIO interrupts (PWRCTRIO[6:0]
6.7.1
PRTCSS Peripheral Register Description(s)
The following table lists the PRTCSS Interface registers (PRTCIF) and
Table 6-10 lists the PRTCSS
registers which can only be accessed via the PRTCIF registers, their corresponding acronyms, and device
memory locations (offsets). For more details, see the TMS320DM36x PRTCSS User's Guide (literature
Table 6-9. PRTC Interface (PRTCIF) Registers
Offset
Acronym
Register Description
0x0
PID
PRTCIF peripheral ID register
0x4
PRTCIF_CTRL
PRTCIF control register
0x8
PRTCIF_LDATA
PRTCIF access lower data register
0xC
PRTCIF_UDATA
PRTCIF access upper data register
0x10
PRTCIF_INTEN
PRTCIF interrupt enable register
0x14
PRTCIF_INTFLG
PRTCIF interrupt flag register
Table 6-10. Power Management and Real Time Clock Subsystem (PRTCSS) Registers
Offset
Acronym
Register Description
0x0
GO_OUT
Global output pin output data register
0x1
GIO_OUT
Global input/output pin output data register
0x2
GIO_DIR
Global input/output pin direction register
0x3
GIO_IN
Global input/output pin input data register
Copyright
2009–2011, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
85