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RST AND PORRST TIMINGS
Timing Requirements for PORRST
(see
Figure 8
)
Switching Characteristics over Recommended Operating Conditions for RST
(1)
TMS470R1B768
16/32-Bit RISC Flash Microcontroller
SPNS108A–AUGUST 2005–REVISED AUGUST 2006
MIN
MAX UNIT
0.6
V
CCPORL
V
CC
low supply level when PORRST must be active during power up
V
high supply level when PORRST must remain active during power up and become
active during power down
V
CCIO
low supply level when PORRST must be active during power up
V
high supply level when PORRST must remain active during power up and become
active during power down
Low-level input voltage after V
CCIO
> V
CCIOPORH
Low-level input voltage of PORRST before V
CCIO
> V
CCIOPORL
Setup time, PORRST active before V
CCIO
> V
CCIOPORL
during power up
Setup time, V
CCIO
> V
CCIOPORL
before V
CC
> V
CCPORL
Hold time, PORRST active after V
CC
> V
CCPORH
Setup time, PORRST active before V
CC
≤
V
CCPORH
during power down
Hold time, PORRST active after V
CC
V
CCIOPORH
Hold time, PORRST active after V
CC
< V
CCPORL
Setup time, PORRST active before V
CC
≤
V
CCIOPORH
during power down
Setup time, V
CC
< V
CCPORL
before V
CCIO
< V
CCIOPORL
V
V
CCPORH
1.5
V
V
CCIOPORL
1.1
V
V
CCIOPORH
2.75
V
V
IL
V
IL(PORRST)
t
su(PORRST)r
t
su(VCCIO)r
t
h(PORRST)r
t
su(PORRST)f
t
h(PORRST)rio
t
h(PORRST)d
t
su(PORRST)fio
t
su(VCCIO)f
0.2 V
CCIO
V
V
ms
ms
ms
μs
ms
ms
ns
ns
0.5
0
0
1
8
1
0
0
0
NOTE: V
CCIO
> 1.1 V before V
CC
> 0.6 V
Figure 8. PORRST Timing Diagram
PARAMETER
MIN
MAX UNIT
Valid time, RST active after PORRST inactive
Valid time, RST active (all others)
4112t
c(OSC)
8t
c(SYS)
t
v(RST)
ns
(1)
Specified values do NOT include rise/fall times. For rise and fall timings, see the "Switching Characteristics for Output Timings versus
Load Capacitance" table.
31
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