參數(shù)資料
型號(hào)： TMP470R1B768PGE
廠商： Texas Instruments, Inc.
英文描述： 16/32-Bit RISC Flash Microcontroller
中文描述： 16/32位RISC閃存微控制器
文件頁(yè)數(shù)： 13/50頁(yè)
文件大?。?/td> 393K
代理商： TMP470R1B768PGE
www.ti.com
Memory Selects
TMS470R1B768
16/32-Bit RISC Flash Microcontroller
SPNS108A–AUGUST 2005–REVISED AUGUST 2006
Memory selects allow the user to address memory arrays (i.e., flash, RAM, and HET RAM) at user-defined
addresses. Each memory select has its own set (low and high) of memory base address registers (MFBAHRx
and MFBALRx) that, together, define the array's starting (base) address, block size, and protection.
The base address of each memory select is configurable to any memory address boundary that is a multiple of
the decoded block size. For more information on how to control and configure these memory select registers,
see the bus structure and memory sections of the
TMS470R1x System Module Reference Guide
(literature
number SPNU189).
For the memory selection assignments and the memory selected, see
Table 3
.
Table 3. Memory Selection Assignment
MEMORY
SELECT
0 (fine)
1 (fine)
2 (fine)
3 (fine)
4 (fine)
MEMORY SELECTED
(ALL INTERNAL)
FLASH
FLASH
RAM
RAM
HET RAM
MEMORY
SIZE
MEMORY BASE ADDRESS
REGISTER
MFBAHR0 and MFBALR0
MFBAHR1 and MFBALR1
MFBAHR2 and MFBALR2
MFBAHR3 and MFBALR3
MFBAHR4 and MFBALR4
STATIC MEM
CTL REGISTER
MPU
NO
NO
YES
YES
768K
48K
(1)
1.5K
SMCR1
(1)
The starting addresses for both RAM memory-select signals cannot be offset from each other by a multiple of the user-defined block
size in the memory-base address register.
RAM
The B768 device contains 48K bytes of internal static RAM configurable by the SYS module to be addressed
within the range of 0x0000_0000 to 0xFFE0_0000. This B768 RAM is implemented in one 48K-byte array
selected by two memory-select signals. This B768 configuration imposes an additional constraint on the memory
map for RAM; the starting addresses for both RAM memory selects cannot be offset from each other by the
multiples of the size of the physical RAM (i.e., 48K bytes for the B768 device). The B768 RAM is addressed
through memory selects 2 and 3.
The RAM can be protected by the memory protection unit (MPU) portion of the SYS module, allowing the user
finer blocks of memory protection than is allowed by the memory selects. The MPU is ideal for protecting an
operating system while allowing access to the current task. For more detailed information on the MPU portion of
the SYS module and memory protection, see the memory section of the
TMS470R1x System Module Reference
Guide
(literature number SPNU189).
F05 Flash
The F05 flash memory is a nonvolatile electrically erasable and programmable memory implemented with a
32-bit-wide data bus interface. The F05 flash has an external state machine for program and erase functions.
See the
flash read
and
flash program and erase
sections below.
Flash Protection Keys
The
program/erase/compaction operations from occurring until after the four protection keys have been matched by
the CPU loading the correct user keys into the FMPKEY control register. The protection keys on the B768 are
located in the last 4 words of the first 16K sector. For more detailed information on flash program and erase
operations, see the TMS470R1x F05 Flash Reference Guide (literature number SPNU213).
B768
device
provides
flash
protection
keys.
These
four
32-bit
protection
keys
prevent
Flash Read
The B768 flash memory is configurable by the SYS module to be addressed within the range of 0x0000_0000 to
0xFFE0_0000. The flash is addressed through memory selects 0 and 1.
NOTE:
The flash external pump voltage (V
CCP
) is required for all operations (program,
erase, and read).
13
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