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| 型號： | TMP470R1B768PGE |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16/32-Bit RISC Flash Microcontroller |
| 中文描述： | 16/32位RISC閃存微控制器 |
| 文件頁數(shù)： | 3/50頁 |
| 文件大小： | 393K |
| 代理商： | TMP470R1B768PGE |
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DESCRIPTION
The TMS470R1B768
(1)
general-purpose16/32-bit reduced instruction set computer (RISC) microcontrollers. The B768 microcontroller
offers high performance utilizing the high-speed ARM7TDMI 16/32-bit RISC central processing unit (CPU),
resulting in a high instruction throughput while maintaining greater code efficiency. The ARM7TDMI 16/32-bit
RISC CPU views memory as a linear collection of bytes numbered upwards from zero. The TMS470R1B768
utilizes the big-endian format where the most significant byte of a word is stored at the lowest numbered byte
and the least significant byte at the highest numbered byte.
TMS470R1B768
16/32-Bit RISC Flash Microcontroller
SPNS108A–AUGUST 2005–REVISED AUGUST 2006
device is a member
of
the
Texas
Instruments
(TI)
TMS470R1x
family
of
High-end embedded control applications demand more performance from their controllers while maintaining low
costs. The B768 RISC core architecture offers solutions to these performance and cost demands while
maintaining low power consumption.
The B768 device contains the following:
ARM7TDMI 16/32-Bit RISC CPU
TMS470R1x system module (SYS) with 470+ enhancements [including an interrupt expansion module (IEM)
and a 16-channel direct-memory access (DMA) controller]
768K-byte flash
48K-byte SRAM
Zero-pin phase-locked loop (ZPLL) clock module
Analog watchdog (AWD) timer
Real-time interrupt (RTI) module
Five serial peripheral interface (SPI) modules
Two serial communications interface (SCI) modules
Three high-end CAN controller (HECC) modules
10-bit multi-buffered analog-to-digital converter (MibADC) with 16 input channels
High-end timer (HET) controlling 32 I/Os
External clock prescale (ECP) module
Up to 86 I/O pins and 1 input-only pin
The functions performed by the 470+ system module (SYS) include:
Address decoding
Memory protection
Memory and peripherals bus supervision
Reset and abort exception management
Expanded interrupt capability with prioritization for all internal interrupt sources
Device clock control
Direct-memory access (DMA) and control
Parallel signature analysis (PSA)
This data sheet includes device-specific information such as memory and peripheral select assignment, interrupt
priority, and a device memory map. For a more detailed functional description of the SYS module, see the
TMS470R1x System Module Reference Guide
(literature number SPNU189). For a more detailed functional
description of the IEM module, see the
TMS470R1x Interrupt Expansion Module (IEM) Reference Guide
(literature number SPNU211). And for a more detailed functional description of the DMA module, see the
TMS470R1x Direct-Memory Access (DMA) Controller Reference Guide
(literature number SPNU210).
The B768 memory includes general-purpose SRAM supporting single-cycle read/write accesses in byte,
half-word, and word modes.
The flash memory on this device is a nonvolatile, electrically erasable and programmable memory implemented
with a 32-bit-wide data bus interface. The flash operates with a system clock frequency of up to 24 MHz. When
in pipeline mode, the flash operates with a system clock frequency of up to 60 MHz. For more detailed
information on the F05 devices flash, see the
F05 flash
section of this data sheet.
(1)
Throughout the remainder of this document, TMS470R1B768 shall be referred to as either the full device name or B768.
3
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