參數(shù)資料
型號： TMP320C40
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： DIGITAL SIGNAL PROCESSORS
中文描述： 數(shù)字信號處理器
文件頁數(shù)： 11/62頁
文件大?。?/td> 1066K
代理商： TMP320C40
SGUS017H
–
OCTOBER 1993
–
REVISED OCTOBER 2001
11
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
SMJ320C40 Signal Descriptions (Continued)
SIGNAL
DESCRIPTION
TYPE
NAME
NO. OF
PINS
LOCAL BUS EXTERNAL INTERFACE (80 PINS) (CONTINUED)
O/Z
Page signal for LSTRB1 accesses
LPAGE1
1
LRDY1
1
I
Ready signal for LSTRB1 accesses
LCE1
1
I
Control enable for the LSTRB1, LPAGE1, and LR/W1 signals
COMMUNICATION PORT 0 INTERFACE (12 PINS)
C0D7
–
C0D0
8
I/O
Communication port 0 data bus
CREQ0
1
I/O
Communication port 0 token-request signal
CACK0
1
I/O
Communication port 0 token-request-acknowledge signal
CSTRB0
1
I/O
Communication port 0 data-strobe signal
CRDY0
1
I/O
Communication port 0 data-ready signal
COMMUNICATION PORT 1 INTERFACE (12 PINS)
Communication port 1 data bus
C1D7
–
C1D0
8
I/O
CREQ1
1
I/O
Communication port 1 token-request signal
CACK1
1
I/O
Communication port 1 token-request-acknowledge signal
CSTRB1
1
I/O
Communication port 1 data-strobe signal
CRDY1
1
I/O
Communication port 1 data-ready signal
COMMUNICATION PORT 2 INTERFACE (12 PINS)
Communication port 2 data bus
C2D7
–
C2D0
8
I/O
CREQ2
1
I/O
Communication port 2 token-request signal
CACK2
1
I/O
Communication port 2 token-request-acknowledge signal
CSTRB2
1
I/O
Communication port 2 data-strobe signal
CRDY2
1
I/O
Communication port 2 data-ready signal
COMMUNICATION PORT 3 INTERFACE (12 PINS)
C3D7
–
C3D0
8
I/O
Communication port 3 data bus
CREQ3
1
I/O
Communication port 3 token-request signal
CACK3
1
I/O
Communication port 3 token-request-acknowledge signal
CSTRB3
1
I/O
Communication port 3 data-strobe signal
CRDY3
1
I/O
Communication port 3 data-ready signal
COMMUNICATION PORT 4 INTERFACE (12 PINS)
C4D7
–
C4D0
8
I/O
Communication port 4 data bus
CREQ4
1
I/O
Communication port 4 token-request signal
CACK4
1
I/O
Communication port 4 token-request-acknowledge signal
CSTRB4
1
I/O
Communication port 4 data-strobe signal
CRDY4
I = input, O = output, Z = high impedance
STRB0, STRB1 and associated signals (R/W1, R/W0, PAGE0, PAGE1, etc.) are effective over the address ranges defined by the
STRB ACTIVE bits.
§
HFH package has additional power and ground pins to reduce noise problems.
1
I/O
Communication port 4 data-ready signal
signal descriptions (continued)
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