參數(shù)資料
型號: TMC2301
廠商: Fairchild Semiconductor Corporation
英文描述: 15, 18, 20 MHz Image Resampling Sequencer(15, 18, 20 MHz圖像再采樣序列發(fā)生器)
中文描述: 15,18,20 MHz的圖像重采樣音序器(15,18,20 MHz的圖像再采樣序列發(fā)生器)
文件頁數(shù): 2/26頁
文件大?。?/td> 237K
代理商: TMC2301
TMC2301
PRODUCT SPECIFICATION
2
Functional Description
General Information
The IRS is a versatile self-sequencing address generator
designed primarily to filter a two-dimensional image or to
remap and resample it from one set of Cartesian coordinates
(x, y) into a new transformed set (u, v). Most applications
use two identical devices in tandem, one generating the row
coordinates (X and U), the other generating the column coor-
dinates (Y and V). The algorithm performed by the
TMC2301 consists of two steps: a coordinate system trans-
formation, followed by pixel interpolation. Interpolation is
necessary when the transformed pixel positions (U, V) do
not coincide with the original pixel positions (X, Y). The
new pixel intensity values are obtained by interpolating the
original pixels in the neighborhood of the transformed pixel
positions. See Figure 1.
The IRS executes a general second order coordinate transfor-
mation of the form:
X(u, v) = Au
2
+ Bu + Cuv + Dv
2
+ Ev + F
Y(u, v) = Gu
2
+ Hu + Kuv + Lv
2
+ Mv + N
where A through N are user-defined parameters. It steps
sequentially through the pixels of a user-defined rectangle in
the new set of coordinates, computing the "old" address
(X, Y) corresponding to each "new" location (U, V).
The TMC2301 uses the external multiplier-accumulator,
connected to the system clock, to calculate the interpolated
pixel value by summing the products of the original pixel
values stored in the source buffer RAM and the appropriate
weights from the polynomial transform lookup table. The
new interpolated image value is then stored in the corre-
sponding (U, V) memory location. Finally, the new image
address is incremented by one pixel in the "U" direction or
reset to the start of the next line (with "V" incremented) pro-
ceeding line-by-line through the entire destination image.
The TMC2301 can support any nearest neighbor, bilinear, or
cubic resampling, according to the user's requirements. The
bilinear and cubic kernels require a coefficient lookup table
and multiplier-accumulator. Both one-pass and two-pass
algorithms are supported. Sophisticated "walkaround" algo-
rithms implementing static filters are also easily realized uti-
lizing convolutional kernels of up to 16 x 16 pixels. For each
output point in a typical static single-pass filter, the IRS will
generate a series of addresses, "walking" around that point in
two dimensions. At the end of each walk, it will advance one
pixel along the output scan line, then begin the walk for the
next pixel.
Block Diagram
REGISTER
LOAD
INTEGER
X
FRACTION
WRITE
ENABLE
REGISTER
ADDRESS
CLK
INSTRUCTIONS
CONTROL WORD
AND TRANSFORM
PARAMETER
STORAGE REGISTER
SOURCE
ADDRESS
GENERATOR
INPUT IMAGE
BOUNDARY
COMPARATOR
OUT OF
RANGE
INTERPOLATION
COEFFICIENT
ADDRESS
SOURCE
ADDRESS
TARGET
ADDRESS
COUNTER
AT
LIMIT
XO,
's
XMIN
XMAX
WALK COUNT
LIMITS
LIMITS
RESET
COUNT
TARGET
OUT ENABLE
UMIN
UMAX
CONTROL
4
PARAMETER
DATA IN
CLK
INITIALIZE
INTERCONNECT:
NEXT ROW/COLUMN
NOOP
8
12
12
TARGET
ADDRESS
END OF ROW/
COLUMN
TARGET
WRITE ENABLE
12
65-2301-02
ACCUMULATE
TRANSFORM
DONE
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMC2302A 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer
TMC2302AH5C 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述:
TMC2302AH5C1 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述:
TMC2302AKEC 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer
TMC2302AKEC1 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer