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參數(shù)資料
| 型號： | TMC2301 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 15, 18, 20 MHz Image Resampling Sequencer(15, 18, 20 MHz圖像再采樣序列發(fā)生器) |
| 中文描述： | 15，18，20 MHz的圖像重采樣音序器（15，18，20 MHz的圖像再采樣序列發(fā)生器） |
| 文件頁數(shù)： | 1/26頁 |
| 文件大?。?/td> | 237K |
| 代理商： | TMC2301 |
www.fairchildsemi.com
Features
Rotation, warping, panning, zooming, and compression of
images in real time
20 MHz clock rate
4096 x 4096 image field addressing capability
User-selectable nearest-neighbor, bilinear interpolation,
and cubic convolution resampling algorithms
Static convolutional filtering of up to 16 x 16 pixel
windows
Single-pass or two-pass convolution operations
Low power consumption CMOS process
Single 5V power supply
Available in a 68-pin grid array and low-cost plastic
leaded chip carrier (J-bend)
Applications
Video special-effects generators
Image recognition systems, robotics
Artificial intelligence
High-precision image registration (LANDSAT
processing)
High-speed data encoding/decoding
General purpose image processing
Image data compression
Description
The TMC2301 is a VLSI circuit which supports image
resampling, rotation, rescaling and filtering by generating
input bit plane, interpolation coefficient lookup table, and
output bit plane memory addresses along with external
multiplier-accumulator control signals. The TMC2301 can
process data fields of up to 4096 x 4096 multibit words at a
clock rate of up to 20 MHz. An Image Resampling
Sequencer (IRS) based system can nearest-neighbor resam-
ple a 512 x 512 image in 15 milliseconds, translating, zoom-
ing, rotating, or warping it, depending on the transform
parameter set loaded. A complete bilinear interpolation of
the same image can be completed in 60 milliseconds. Image
resampling speed is independent of the angle of rotation,
degree of warp, or amount of zoom specified.
A high performance, TMC2301-based system can execute
bilinear and cubic convolution algorithms that rotate images
accurately and in real time. Keystone or other perspective
correction, image plane distortion, and numerous other
second order polynomial transformations can be program-
med and executed under direct user control. Direct access to
the interpolation coefficient lookup table allows dynamic
modification of the algorithm.
Following an initialization with the transform parameters
and control bits defining the operation to be executed, the
IRS assumes control of the input and output data fields and
executes unattended. All inputs except INTER and all out-
puts are registered on the rising edge of clock. All outputs
are three-state controlled except ACC, CZERO, END, and
DONE.
Fabricated in a 1 micron CMOS process, the TMC2301
operates at clock rates of up to 20 MHz over the full
commercial (0 to 70
°
C) temperature and supply voltage
ranges. All signals are TTL compatible.
Logic Symbol
LDR
WEN
B3-0
4
P11-0
X11-0
U11-0
CA7-0
CLK
INIT
CZERO
END
UWRI
ACC
DONE
OETA
INTER
NOOP
8
12
12
12
65-2301-01
T MC2301
Image Resampling S equenc er
15, 18, 20 MHz
Rev. 1.
1
.0
相關PDF資料 |
PDF描述 |
|---|---|
| TMC2302A | Image Manipulation Sequencer |
| TMC2302AH5C | Image Manipulation Sequencer |
| TMC2302AH5C1 | Image Manipulation Sequencer |
| TMC2302AKEC | Image Manipulation Sequencer |
| TMC2302AKEC1 | Image Manipulation Sequencer |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TMC2302A | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer |
| TMC2302AH5C | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述: |
| TMC2302AH5C1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述: |
| TMC2302AKEC | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer |
| TMC2302AKEC1 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer |
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