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參數(shù)資料
| 型號： | TLFD600 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | GT 4C 2#8 2#16 PIN RECP WALL |
| 中文描述： | 寬帶編解碼器帶有集成線路驅(qū)動器和接收 |
| 文件頁數(shù)： | 30/36頁 |
| 文件大?。?/td> | 502K |
| 代理商： | TLFD600 |
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TLFD600
ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER
SLAS280B
–
MAY 2000
–
REVISED NOVEMBER 2000
30
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PROGRAMMING INFORMATION
NCO_DIV_DELAY
–
numerically controlled oscillator delay control register
Address: 01101b
Contents at reset: 00000000b
D7
D6
D5
D4
D3
D2
D1
D0
NCDLY[7]
NCDLY[6]
NCDLY[5]
NCDLY[4]
NCDLY[3]
NCDLY[2]
NCDLY[1]
NCDLY[0]
Table 14. NCO Value Table
BIT NAME
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
NCDLY[7:0]
0
0
0
0
0
0
0
0
0
Invalid
0
0
0
0
0
0
1
ADCLK jittered 1 sample clocks (of ADCLK) after write
into the NCO_DIV_DELAY register
–
–
–
–
–
–
–
–
ADCLK jittered 2 to 255 sample clocks (of ADCLK)
after write into the NCO_DIV_DELAY register
NOTE 10: This register is also the only means of communicating to the codec that the ADCLK must be jittered. Thus, not writing a value implies
that jitter will not take place even if other registers have non-default values. This register does not remember its value. All other registers
store their values unless reset.
NCO_DELTA
–
numerically controlled oscillator delta value register
Address: 01110b
Contents at reset: 00000000b
D7
D6
D5
D4
D3
D2
D1
D0
NCDEL[3]
NCDEL[2]
NCDEL[1]
NCDEL[0]
NCRPT[3]
NCRPT[2]
NCRPT[1]
NCRPT[0]
Table 15. NCO_DELTA Delta and Repeat Table
BIT NAME
D7
D6
D5
0
D4
D3
D2
D1
D0
DESCRIPTION
NCDEL[3:0]
0
0
0
DELTA = 0
0
0
0
1
DELTA = 1
1
1
1
1
DELTA =
–
1
NCRPT[3:0]
0
0
0
0
REPEAT = 0
0
0
0
1
REPEAT = 1
–
–
–
–
1
1
1
1
REPEAT = 15
NOTE 11: N = NCODEF[6:0] + DELTA, and ADCCLK = (35.328
×
4)/(N/2).
Example:
1.
If NCDEL[3:0] = 0000 (DELTA = 0), then N = 64. And ADCCLK = (35.328
×
4)/(N/2).
If NCDEL[3:0] = 0001 (DELTA = 1), then N = 65. And ADCCLK = (35.328
×
4)/(N/2).
2.
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