參數(shù)資料
型號(hào)： TLFD600
廠商： Texas Instruments, Inc.
英文描述： GT 4C 2#8 2#16 PIN RECP WALL
中文描述： 寬帶編解碼器帶有集成線路驅(qū)動(dòng)器和接收
文件頁(yè)數(shù)： 27/36頁(yè)
文件大?。?/td> 502K
代理商： TLFD600
TLFD600
ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER
SLAS280B
–
MAY 2000
–
REVISED NOVEMBER 2000
27
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PROGRAMMING INFORMATION
equalizer shape control register
Address: 00101b
Contents at reset: 00000000b
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
Reserved
Reserved
Reserved
Reserved
EQS[2]
EQS[1]
EQS[0]
Table 9. EQR Shape Table
BIT NAME
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
Reserved
0
Reserved
Reserved
0
Reserved
Reserved
0
Reserved
Reserved
0
Reserved
Reserved
0
Reserved
EQS[2]
EQS[1]
EQS[0]
0
0
0
RX EQ = 0 dB/MHz
0
0
1
RX EQ = 5 dB/MHz
0
1
0
RX EQ = 10 dB/MHz
0
1
1
RX EQ = 15 dB/MHz
1
0
0
RX EQ = 20 dB/MHz
1
0
1
RX EQ = 25 dB/MHz
–
–
–
See Note 6 for all other combinations
NOTE 6. Performance of the codec for invalid combination of bits is not guaranteed and such combinations should not be used.
VCR-M
–
VCXO DAC control register MSB
Address: 00110b
Contents at reset: 00000000b
D7
D6
D5
D4
D3
D2
D1
D0
VCRMM[7]
VCRM[6]
VCRM[5]
VCRM[4]
VCRM[3]
VCRM[2]
VCRM[1]
VCRM[0]
VCR-L
–
VCXO DAC control register LSB
Address: 00111b
Contents at reset: 00000000b
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
VCRL[3]
VCRL[2]
VCRL[1]
VCRL[0]
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