參數(shù)資料
型號(hào)： TLFD600
廠商： Texas Instruments, Inc.
英文描述： GT 4C 2#8 2#16 PIN RECP WALL
中文描述： 寬帶編解碼器帶有集成線路驅(qū)動(dòng)器和接收
文件頁(yè)數(shù)： 22/36頁(yè)
文件大?。?/td> 502K
代理商： TLFD600
TLFD600
ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER
SLAS280B
–
MAY 2000
–
REVISED NOVEMBER 2000
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics, T
A
= 25
°
C, analog power supplies = 3.3 V, digital power supplies = 3.3 V,
AVDD_DRIVER = 12 V, f
CLKIN
= 35.328 MHz (unless otherwise noted) (continued)
reference voltage
PARAMETER
MIN
TYP
MAX
UNIT
REFP
2.4
2.5
2.6
V
TXBANDGAP, RXBANDGAP
1.4
1.5
1.6
V
REFM
0.4
0.5
0.6
V
VMID_ADC
1.47
V
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
serial port (see Figures 18 and 19)
PARAMETER
MIN
TYP
MAX
UNIT
td(1)
td(2)
td(3)
td(4)
td(5)
tsu
th
Delay time, FSX goes high after SCLK
↑
Delay time, FSX goes low after SCLK
↑
Delay time, SDX valid after SCLK
↑
Delay time, FSR goes high after SCLK
↑
Delay time, FSR goes low after SCLK
↑
Set up time, SDR ready before SCLK
↑
Hold time, SDR keep active after SCLK
↑
4
ns
4
ns
4
ns
4
ns
4
ns
6
ns
2
ns
FSX
(Output)
SCLK
(Output)
SDX
(Ouput)
td(1)
td(2)
td(3)
Figure 18. Serial Interface Timing (TX Channel)
FSR
(Output)
SCLK
(Output)
SDR
(Input)
t(su)
td(4)
td(5)
th
Figure 19. Serial Interface Timing (RX Channel)
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