參數(shù)資料
型號: TLFD600
廠商: Texas Instruments, Inc.
英文描述: GT 4C 2#8 2#16 PIN RECP WALL
中文描述: 寬帶編解碼器帶有集成線路驅(qū)動器和接收
文件頁數(shù): 31/36頁
文件大小: 502K
代理商: TLFD600
TLFD600
ADSL CODEC WITH INTEGRATED LINE DRIVER AND RECEIVER
SLAS280B
MAY 2000
REVISED NOVEMBER 2000
31
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PROGRAMMING INFORMATION
MCR
master control register
Address: 01111b
Contents at reset: 00000000b
D7
D6
D5
D4
D3
D2
D1
D0
GP12EN
DLBEN
ALBEN
SWRST
VCDACPD
RXPD
TXPD
SWREFPD
Table 16. MCR Control Table
BIT NAME
D7
D6
D5
D4
D3
D2
D1
D0
DESCRIPTION
GP12EN
1
Show GPIO 1, 2 in SDX primary
DLBEN
1
Enable digital loop back
ALBEN
1
Enable analog loop back
SWRST
1
Software reset
VCDACPD
1
Power down VCXO DAC
RXPD
1
Power down RX channel
TXPD
1
Power down TX channel
SWREFPD
NOTES: 12. Analog loop back means looping back of the analog TX output to the RX input (the RX high-pass filters are bypassed). This way
the codec can be tested without needing external analog sources. Refer to block diagram for signal path.
13. Digital loop back means looping back the digital RX output to the TX input. Refer to block diagram for signal path.
1
Power down main reference
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