參數(shù)資料
型號(hào): TL16C554AI
廠商: Texas Instruments, Inc.
英文描述: ASYNCHRONOUS-COMMUNICATIONS ELEMENT
中文描述: 異步通信元
文件頁數(shù): 25/40頁
文件大?。?/td> 605K
代理商: TL16C554AI
TL16C554A, TL16C554AI
ASYNCHRONOUS-COMMUNICATIONS ELEMENT
SLLS509A
AUGUST 2001
REVISED JULY 2003
25
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
line-status register (LSR) (continued)
Bit 4: LSR4 is the break interrupt (BI) bit. Break interrupt is set when the received data input is held in the
spacing (low) state for longer than a full word transmission time (start bit + data bits + parity + stop bits).
The BI indicator is cleared when the CPU reads the contents of the LSR. In the FIFO mode, this is associated
with a particular character in the FIFO. LSR2 reflects the BI when the break character is at the top of the
FIFO. The error is detected by the CPU when its associated character is at the top of the FIFO during the
first LSR read. Only one zero character is loaded into the FIFO when BI occurs.
LSR1
LSR4 are the error conditions that produce a receiver line status interrupt (priority 1 interrupt in the
interrupt-identification register) when any of the conditions are detected. This interrupt is enabled by setting
IER2 in the interrupt-enable register.
Bit 5: LSR5 is the transmitter holding register empty (THRE) bit. THRE indicates that the ACE is ready to
accept a new character for transmission. The THRE bit is set when a character is transferred from the
transmitter holding register (THR) to the transmitter shift register (TSR). LSR5 is cleared when the CPU
loads THR. LSR5 is not cleared by a CPU read of the LSR. In the FIFO mode, this bit is set when the transmit
FIFO is empty, and it is cleared when one byte is written to the transmit FIFO. When the THRE interrupt
is enabled by IER1, THRE causes a priority 3 interrupt in the IIR. If THRE is the interrupt source indicated
by IIR, INTRPT is cleared by a read of the IIR.
Bit 6: LSR6 is the transmitter register empty (TEMT) bit. TEMT is set when both THR and TSR are empty.
LSR6 is cleared when a character is loaded into THR, and remains low until the character is transferred out
of TXx. TEMT is not cleared by a CPU read of the LSR. In the FIFO mode, this bit is set when both the
transmitter FIFO and shift register are empty.
Bit 7: LSR7 is the receiver FIFO error bit. The LSR7 bit is cleared in the TL16C450 mode (see FCR bit 0).
In the FIFO mode, it is set when at least one of the following data errors is in the FIFO: parity error, framing
error, or break interrupt indicator. It is cleared when the CPU reads the LSR, unless there are subsequent
errors in the FIFO.
NOTE
The LSR may be written. However, this function is intended only for factory test. It should be considered as read
only by applications software.
Table 6. Line-Status Register BIts
LSR BITS
1
0
LSR0 data ready (DR)
Ready
Not ready
LSR1 overrun error (OE)
Error
No error
LSR2 parity error (PE)
Error
No error
LSR3 framing error (FE)
Error
No error
LSR4 break interrupt (BI)
Break
No break
LSR5 transmitter holding register empty (THRE)
Empty
Not empty
LSR6 transmitter register empty (TEMT)
Empty
Not empty
LSR7 receiver FIFO error
Error in FIFO
No error in FIFO
相關(guān)PDF資料
PDF描述
TL16C554I ASYNCHRONOUS COMMUNICATIONS ELEMENT
TL2575-15I 1-A SIMPLE STEP-DOWN SWITCHING VOLTAGE REGULATORS
TL2575-33I 1-A SIMPLE STEP-DOWN SWITCHING VOLTAGE REGULATORS
TL2575_0701 1-A SIMPLE STEP-DOWN SWITCHING VOLTAGE REGULATORS
TL3414AIPE4 DUAL HIGH OUTPUT CURRENT OPERATIONAL AMPLIFIER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TL16C554AIFN 功能描述:UART 接口集成電路 Quad UART w/ 16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
TL16C554AIFNR 功能描述:UART 接口集成電路 Quad UART w/ 16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
TL16C554AIPN 功能描述:UART 接口集成電路 Quad UART with 16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
TL16C554AIPNG4 功能描述:UART 接口集成電路 Quad UART with 16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
TL16C554AIPNR 功能描述:UART 接口集成電路 Quad UART with 16-Byte FIFOs RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel