
192
Agere Systems Inc.
Data Sheet
May 2001
155/622/2488 Mbits/s Data Interface
TDAT042G5 SONET/SDH
Register Descriptions
(continued)
PT Registers
This section gives a brief description of each register bit and its functionality. All algorithms are described in the
main text of the document. The abbreviations after each register indicate if the register is read only (RO), read/write
(R/W), write only (WO), or clear-on-read or clear-on-write (COR/W).
0x indicates a hexadecimal value in the Reset Default column. Otherwise, the entry is binary. This is true for every
register table in the document.
Table 95. Register 0x0800: PT Macrocell Version Number (RO)
Reset default of register = 0x0000.
Table 96. Register 0x0801: PT Interrupt (RO)
Reset default of register = 0x0000.
Table 97. Registers 0x0802, 0x080F, 0x081C, 0x0829 and 0x0803, 0x0810, 0x081D, 0x082A: PT Delta/Event
Parameters (COR/W)
Reset default of registers = 0x0000.
Address
(Hex)
0800
Bit #
Name
Function
Reset
Default
0x00
15
—
8
—
Reserved.
These bits must be written to their
reset default value (0x00).
Macrocell Version Number.
The version of the
macrocell will increment each time a change
occurs to the macrocell functionality.
7
—
0
PT_VERSION[7:0]
0x00
Address
(Hex)
0801
Bit #
Name
Function
Reset
Default
0x000
15
—
4
—
Reserved.
These bits must be written to their
reset default value (0x000).
Interrupt.
Active-high
interrupt bit on a per-port
basis. These bits are the ORing of all event and
delta bits associated with a particular port. An
event or delta bit contribution can be inhibited
from contributing to the interrupt by setting the
appropriate mask bit.
3
2
1
0
PT_INT[D]
PT_INT[C]
PT_INT[B]
PT_INT[A]
0x0
Address
(Hex)
0802, 080F,
081C, 0829
Bit #
Name
Function
Reset
Default
0
15
RJ1DMONMIS[A
—
D]E
Receive J1 Data Monitor Mismatch.
Event bit
indicates a mismatch has occurred between the
expected J1 value and the received value.
Reserved.
These bits must be written to their
reset default value (000).
Receive Pointer Interpretation Hardware
Delta.
Delta bits indicate a change of the
associated state bit.
14
—
12
—
000
11
—
0
RPIHD[A
—
D][1
—
12]
0x000