參數(shù)資料
型號(hào)： ST7PLU09MCTRE
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO8
封裝： 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8
文件頁數(shù)： 14/124頁
文件大?。?/td> 1995K
代理商： ST7PLU09MCTRE
Electrical characteristics
ST7LUS5, ST7LU05, ST7LU09
110/124
12.10
10-bit ADC characteristics
Figure 58.
Typical application with ADC
Table 82.
10-bit ADC characteristics(1)
Symbol
Parameter
Conditions
Min
Typ(2)
Max
Unit
fADC
ADC clock frequency
4
MHz
VAIN
Conversion voltage range(3)
VSSA
VDDA
V
RAIN
External input resistor
VDD = 5V, fADC =4 MHz
8k(4)
VDD = 3.3V, fADC =4MHz
7k(4)
CADC
Internal sample and hold capacitor
3
pF
tSTAB
Stabilization time after ADC enable
fCPU = 8 MHz, fADC = 4 MHz
0(5)
s
tADC
Conversion time (Sample+Hold)
3.5
Sample capacitor loading time
4
1/fADC
Hold conversion time
10
1.
Subject to general operating condition for VDD, fOSC, and TA unless otherwise specified.
2.
Unless otherwise specified, typical data are based on TA = 25°C and VDD -VSS = 5V. They are given only as design
guidelines and are not tested.
3.
When VDDA and VSSA pins are not available on the pinout, the ADC refers to VDD and VSS.
4.
Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k
). Data
based on characterization results, not tested in production.
5.
The stabilization time of the A/D converter is masked by the first tLOAD. The first conversion after the enable is then always
valid.
AINx
ST7LUxx
VDD
IL
±1A
VT
0.6V
VT
0.6V
CADC
VAIN
RAIN
10-bit A/D
Conversion
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