參數(shù)資料
型號: ST7PLU09MCTRE
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO8
封裝: 0.150 INCH, ROHS COMPLIANT, PLASTIC, SOP-8
文件頁數(shù): 11/124頁
文件大?。?/td> 1995K
代理商: ST7PLU09MCTRE
Electrical characteristics
ST7LUS5, ST7LU05, ST7LU09
108/124
12.9
Control pin characteristics
TA = -40°C to 125°C, unless otherwise specified
Table 81.
Asynchronous RESET pin
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage
VSS - 0.3
0.3VDD
V
VIH
Input high level voltage
0.7VDD
VDD + 0.3
Vhys
Schmitt trigger voltage
hysteresis(1)
1.
Data based on characterization results, not tested in production
2V
VOL
Output low level voltage(2)
2.
The IIO current sunk must always respect the absolute maximum rating specified in Table 62: Current
characteristics and the sum of IIO (I/O ports and control pins) must not exceed IVSS.
VDD =5V IIO =+2mA
400
mV
RON
Pull-up equivalent resistor(3)
3.
The RON pull-up equivalent resistor is based on a resistive transistor. Specified for voltages on RESET pin
between VILmax and VDD.
VIN =VSS
VDD =5V
30
50
70
k
VDD =3.3V
90(1)
tw(RSTL)out
Generated reset pulse
duration
Internal reset sources
90(1)
s
th(RSTL)in
External reset pulse hold
time(4)
4.
To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses
applied on RESET pin with a duration below th(RSTL)in can be ignored.
20
s
tg(RSTL)in Filtered glitch duration
200
ns
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