參數(shù)資料
型號: ST7FLITE09Y0M1
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO16
封裝: 0.150 INCH, PLASTIC, SOP-16
文件頁數(shù): 111/111頁
文件大?。?/td> 671K
代理商: ST7FLITE09Y0M1
ST7FLITE0
99/111
13.11 8-BIT ADC CHARACTERISTICS
Subject to general operating condition for VDD,fOSC, and TA unless otherwise specified.
Figure 75. Typical Application with ADC
Notes:
1. Unless otherwise specified, typical data are based on TA=25°C and VDD-VSS=5V. They are given only as design guide-
lines and are not tested.
2. When VDDA and VSSA pins are not available on the pinout, the ADC refers to VDD and VSS.
3. Any added external serial resistor will downgrade the ADC accuracy (especially for resistance greater than 10k
). Data
based on characterization results, not tested in production.
4. The stabilization time of the AD converter is masked by the first tLOAD. The first conversion after the enable is then
always valid.
5. Guaranteed by Design. Not tested in production.
13.11.0.1 General PCB Design Guidelines
To obtain best results, some general design and
layout rules should be followed when designing
the application PCB to shield the the noise-sensi-
tive, analog physical interface from noise-generat-
ing CMOS logic signals.
– Properly place components and route the signal
traces on the PCB to shield the analog inputs.
Analog signals paths should run over the analog
ground plane and be as short as possible. Isolate
analog signals from digital signals that may
switch while the analog inputs are being sampled
by the A/D converter. Do not toggle digital out-
puts on the same I/O port as the A/D input being
converted.
Symbol
Parameter
Conditions
Min
Typ 1)
Max
Unit
fADC
ADC clock frequency
4
MHz
VAIN
Conversion voltage range 2)
VSSA
VDDA
V
RAIN
External input resistor
10 3)
k
CADC
Internal sample and hold capacitor
6
pF
tSTAB
Stabilization time after ADC enable
fCPU=8MHz, fADC=4MHz
0 4)
s
tCONV
Conversion time (tSAMPLE+tHOLD)3
tSAMPLE Sample capacitor loading time
4
1/fADC
tHOLD
Hold conversion time
8
IADC
Analog Part
1 5)
mA
Digital Part
0.2 5)
AINx
ST72XXX
VDD
IL
±1A
VT
0.6V
VT
0.6V
CADC
6pF
VAIN
RAIN
8-Bit A/D
Conversion
2k
(max)
1
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